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URL https://opencores.org/ocsvn/versatile_library/versatile_library/trunk

Subversion Repositories versatile_library

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  • This comparison shows the changes necessary to convert path
    /versatile_library/trunk/sim/rtl_sim
    from Rev 88 to Rev 91
    Reverse comparison

Rev 88 → Rev 91

/run/Makefile
1,4 → 1,8
VERILOG_FILES = ./../../../rtl/verilog/versatile_library.v
 
wb_b3_ram_be.v:
tb_wb_b3_ram_be:
vppreproc --noline --noblank +define+SYSTEMVERILOG +define+WB_B3_RAM_BE $(VERILOG_FILES) > wb_b3_ram_be.v
vlog -reportprogress 300 -work work /home/michael/work/ocsvn/versatile_library/trunk/sim/rtl_sim/run/wb_b3_ram_be.v
vlog -reportprogress 300 -work work /home/michael/work/ocsvn/versatile_library/trunk/bench/wbm.v
vlog -reportprogress 300 -work work /home/michael/work/ocsvn/versatile_library/trunk/bench/tb_wb_b3_ram_be.v
vsim -do "run 10 us" -l log.txt -c work.vl_wb_b3_ram_be_tb

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