URL
https://opencores.org/ocsvn/versatile_library/versatile_library/trunk
Subversion Repositories versatile_library
Compare Revisions
- This comparison shows the changes necessary to convert path
/versatile_library/trunk/sim/rtl_sim
- from Rev 92 to Rev 102
- ↔ Reverse comparison
Rev 92 → Rev 102
/run/Makefile
12,3 → 12,9
vlog -reportprogress 300 -work work ./wb_b3_dpram.v |
vlog -reportprogress 300 -work work ./../../../bench/wbm.v |
vlog -reportprogress 300 -work work ./../../../bench/tb_wb_b3_dpram.v |
|
tb_wb_cache: |
vppreproc --noline --noblank +define+SYSTEMVERILOG +define+WB_CACHE +define+WB_RAM +define+RAM_BE $(VERILOG_FILES) > wb_cache.v |
vlog -reportprogress 300 -work work ./wb_cache.v |
vlog -reportprogress 300 -work work ./../../../bench/wbm.v |
vlog -reportprogress 300 -work work ./../../../bench/tb_wb_cache.v |