URL
https://opencores.org/ocsvn/versatile_library/versatile_library/trunk
Subversion Repositories versatile_library
Compare Revisions
- This comparison shows the changes necessary to convert path
/versatile_library/trunk/sim
- from Rev 87 to Rev 88
- ↔ Reverse comparison
Rev 87 → Rev 88
/rtl_sim/run/Makefile
1,2 → 1,4
wb_dpram_be: |
vppreproc --noline --noblank +define+SYSTEMVERILOG +define+WB_DPRAM_BE ../../../rt/verilog/versatile_library.v > wb_dp_ram_be.v |
VERILOG_FILES = ./../../../rtl/verilog/versatile_library.v |
|
wb_b3_ram_be.v: |
vppreproc --noline --noblank +define+SYSTEMVERILOG +define+WB_B3_RAM_BE $(VERILOG_FILES) > wb_b3_ram_be.v |