URL
https://opencores.org/ocsvn/wb_z80/wb_z80/trunk
Subversion Repositories wb_z80
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- from Rev 4 to Rev 3
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Rev 4 → Rev 3
/trunk/rtl/memstate2.v
109,10 → 109,10
// complete before starting the ir1 operation |
//-------1---------2---------3--------CVS Log -----------------------7---------8---------9--------0 |
// |
// $Id: memstate2.v,v 1.2 2004-04-16 16:21:04 bporcella Exp $ |
// $Id: memstate2.v,v 1.1.1.1 2004-04-13 23:50:19 bporcella Exp $ |
// |
// $Date: 2004-04-16 16:21:04 $ |
// $Revision: 1.2 $ |
// $Date: 2004-04-13 23:50:19 $ |
// $Revision: 1.1.1.1 $ |
// $Author: bporcella $ |
// $Locker: $ |
// $State: Exp $ |
119,11 → 119,8
// |
// Change History: |
// $Log: not supported by cvs2svn $ |
// Revision 1.1.1.1 2004/04/13 23:50:19 bporcella |
// import first files |
// |
// |
// |
//-------1---------2---------3--------Module Name and Port List------7---------8---------9--------0 |
module memstate2(wb_adr, wb_we, wb_cyc, wb_stb, wb_lock, wb_tga_io, wb_dat_o, add_out, |
exec_ir2, ir1, ir2, ir1dd, ir1fd, ir2dd, ir2fd, nn, sp, |
140,8 → 137,7
); |
|
//-------1---------2---------3--------Output Ports---------6---------7---------8---------9--------0 |
// mod only to checkout lint |
// |
|
output [15:0] wb_adr; |
output wb_we; |
output wb_cyc; |