URL
https://opencores.org/ocsvn/zap/zap/trunk
Subversion Repositories zap
Compare Revisions
- This comparison shows the changes necessary to convert path
/zap
- from Rev 6 to Rev 7
- ↔ Reverse comparison
Rev 6 → Rev 7
trunk/ZAP/hw/sim/sample_command_cache_experimental.csh
Property changes :
Deleted: svn:executable
## -1 +0,0 ##
-*
\ No newline at end of property
Index: trunk/ZAP/hw/sim/sample_command_noirq.csh
===================================================================
--- trunk/ZAP/hw/sim/sample_command_noirq.csh (revision 6)
+++ trunk/ZAP/hw/sim/sample_command_noirq.csh (nonexistent)
@@ -1,2 +0,0 @@
-# A sample command to run test without cache.
-xterm -e 'perl run_sim.pl +zap_root+../../ +sim +test+factorial +ram_size+65536 +dump_start+1990+100 +scratch+/tmp +max_clock_cycles+100000 +bp+1024 +fifo+4 +rtl_file_list+../rtl/rtl_files.list +tb_file_list+../tb/bench_files.list +post_process+post_process.pl;cat'
trunk/ZAP/hw/sim/sample_command_noirq.csh
Property changes :
Deleted: svn:executable
## -1 +0,0 ##
-*
\ No newline at end of property
Index: trunk/ZAP/hw/sim/sample_command_cache_nodebug.csh
===================================================================
--- trunk/ZAP/hw/sim/sample_command_cache_nodebug.csh (revision 6)
+++ trunk/ZAP/hw/sim/sample_command_cache_nodebug.csh (nonexistent)
@@ -1,2 +0,0 @@
-# A sample command to run test without cache.
-xterm -e 'perl run_sim.pl +zap_root+../../ +sim +test+factorial +ram_size+65536 +dump_start+1990+100 +scratch+/tmp +irq_en +max_clock_cycles+100000 +bp+1024 +fifo+4 +rtl_file_list+../rtl/rtl_files.list +tb_file_list+../tb/bench_files.list +cmmu_en +cache_size+1024+1024 +dtlb+8+8+8 +itlb+8+8+8 +post_process+post_process.pl;cat'
trunk/ZAP/hw/sim/sample_command_cache_nodebug.csh
Property changes :
Deleted: svn:executable
## -1 +0,0 ##
-*
\ No newline at end of property
Index: trunk/ZAP/hw/sim/sample_command.csh
===================================================================
--- trunk/ZAP/hw/sim/sample_command.csh (revision 6)
+++ trunk/ZAP/hw/sim/sample_command.csh (nonexistent)
@@ -1,2 +0,0 @@
-# A sample command to run test without cache.
-xterm -e 'perl run_sim.pl +zap_root+../../ +sim +test+factorial +ram_size+65536 +dump_start+1990+100 +scratch+/tmp +irq_en +max_clock_cycles+100000 +bp+1024 +fifo+4 +rtl_file_list+../rtl/rtl_files.list +tb_file_list+../tb/bench_files.list +cache_size+1024+1024 +dtlb+8+8+8 +itlb+8+8+8 +post_process+post_process.pl ; cat'
trunk/ZAP/hw/sim/sample_command.csh
Property changes :
Deleted: svn:executable
## -1 +0,0 ##
-*
\ No newline at end of property
Index: trunk/ZAP/hw/sim/sample_command_cache_nodebug_noirq.csh
===================================================================
--- trunk/ZAP/hw/sim/sample_command_cache_nodebug_noirq.csh (revision 6)
+++ trunk/ZAP/hw/sim/sample_command_cache_nodebug_noirq.csh (nonexistent)
@@ -1,2 +0,0 @@
-# A sample command to run test without cache.
-xterm -e 'perl run_sim.pl +zap_root+../../ +sim +test+factorial +ram_size+65536 +dump_start+1990+100 +scratch+/tmp +max_clock_cycles+100000 +bp+1024 +fifo+4 +rtl_file_list+../rtl/rtl_files.list +tb_file_list+../tb/bench_files.list +cmmu_en +cache_size+1024+1024 +dtlb+8+8+8 +itlb+8+8+8 +post_process+post_process.pl;cat'
trunk/ZAP/hw/sim/sample_command_cache_nodebug_noirq.csh
Property changes :
Deleted: svn:executable
## -1 +0,0 ##
-*
\ No newline at end of property
Index: trunk/ZAP/hw/sim/README
===================================================================
--- trunk/ZAP/hw/sim/README (nonexistent)
+++ trunk/ZAP/hw/sim/README (revision 7)
@@ -0,0 +1 @@
+Run run_sim_gui.pl
Index: trunk/ZAP/hw/sim/run_sim.pl
===================================================================
--- trunk/ZAP/hw/sim/run_sim.pl (revision 6)
+++ trunk/ZAP/hw/sim/run_sim.pl (revision 7)
@@ -32,8 +32,8 @@
+bp+ -- Number of entries in branch predictor memory.
+fifo+ -- Depth of pre-fetch buffer in CPU.
+post_process+ -- Point this to post_process.pl or any other Perl script. Script runs after sim.
-+tlb_debug -- Enable TLB debugging interactive.
-+nodump -- Do not write VCD.
+[+tlb_debug] -- Enable TLB debugging interactive.
+[+nodump] -- Do not write VCD.
###############################################################################
";
/trunk/ZAP/hw/sim/run_sim_gui.pl
0,0 → 1,129
#!/usr/bin/perl |
|
use strict; |
use warnings; |
|
my $system = 'dialog --backtitle "ZAP Simulation Options" --title "ZAP Simulation Options" --form "ZAP simulation options" 25 100 16\ |
"ZAP Root (ZAP_HOME)" 1 1 "../.." 1 25 25 30\ |
"Seed" 2 1 "0 " 2 25 25 30\ |
"Define SIM(Y/N)?" 3 1 "Y " 3 25 25 30\ |
"Testcase" 4 1 "factorial " 4 25 25 30\ |
"Cache/MMU Enable(Y/N)?" 5 1 "Y " 5 25 25 30\ |
"External RAM size(bytes)" 6 1 "32768 " 6 25 25 30\ |
"dump start addr+words" 7 1 "1992+100 " 7 25 25 30\ |
"DTLB(sect+small+large)" 8 1 "8+8+8 " 8 25 25 30\ |
"ITLB(sect+small+large)" 9 1 "8+8+8 " 9 25 25 30\ |
"Cache size(code+data)" 10 1 "1024+1024" 10 25 25 30\ |
"IRQ from bench(Y/N)?" 11 1 "Y" 11 25 25 30\ |
"FIQ from bench(Y/N)?" 12 1 "N" 12 25 25 30\ |
"Scratch path" 13 1 "/tmp" 13 25 25 30\ |
"Max clock cycles" 14 1 "100000" 14 25 25 30\ |
"RTL file list" 15 1 "../rtl/rtl_files.list" 15 25 25 30\ |
"Bench file list" 16 1 "../tb/bench_files.list" 16 25 25 30\ |
"Branch predictor entries" 17 1 "1024" 17 25 25 30\ |
"FIFO depth" 18 1 "4" 18 25 25 30\ |
"Post processing script" 19 1 "post_process.pl" 19 25 25 30\ |
"TLB dbg msg enable(Y/N)?" 20 1 "N" 20 25 25 30\ |
"Generate VCD(Y/N)?" 21 1 "Y" 21 25 25 30 --stdout'; |
|
$system = `$system`; |
|
print "Parsing options...\n"; |
print $system; |
$system =~ s/\n/!/g; |
print $system; |
|
my $zap_home ; |
my $seed ; |
my $sim ; |
my $testcase ; |
my $cmmu ; |
my $ram_size ; |
my $memdumpstart; |
my $dtlb ; |
my $itlb ; |
my $csize ; |
my $irq ; |
my $fiq ; |
my $scratch_path; |
my $maxclockcycles; |
my $rtlfilelist ; |
my $tbfilelist ; |
my $bp ; |
my $fifo ; |
my $pps ; |
my $tlbdebug ; |
my $genvcd ; |
|
my $command; |
|
if ( $system =~ m#^(.*?)!(.*?)!(.*?)!(.*?)!(.*?)!(.*?)!(.*?)!(.*?)!(.*?)!(.*?)!(.*?)!(.*?)!(.*?)!(.*?)!(.*?)!(.*?)!(.*?)!(.*?)!(.*?)!(.*?)!(.*?)!$# ) { |
|
$zap_home = $1; |
$seed = $2; |
$sim = $3; |
$testcase = $4; |
$cmmu = $5; |
$ram_size = $6; |
$memdumpstart = $7; |
$dtlb = $8; |
$itlb = $9; |
$csize = $10; |
$irq = $11; |
$fiq = $12; |
$scratch_path= $13; |
$maxclockcycles = $14; |
$rtlfilelist = $15; |
$tbfilelist = $16; |
$bp = $17; |
$fifo = $18; |
$pps = $19; |
$tlbdebug = $20; |
$genvcd = $21; |
|
print " |
zap_home = $zap_home |
seed = $seed |
sim = $sim |
testcase = $testcase |
cmmu = $cmmu |
ram_size = $ram_size |
memdumpstart = $memdumpstart |
dtlb = $dtlb |
itlb = $itlb |
csize = $csize |
irq = $irq |
fiq = $fiq |
scratch_path = $scratch_path |
maxclockcycles = $maxclockcycles |
rtlfilelist = $rtlfilelist |
tbfilelist = $tbfilelist |
bp = $bp |
fifo = $fifo |
pps = $pps |
tlbdebug = $tlbdebug |
genvcd = $genvcd |
"; |
|
$command = " perl run_sim.pl +zap_root+$zap_home +test+$testcase +ram_size+$ram_size +dump_start+$memdumpstart +scratch+$scratch_path +max_clock_cycles+$maxclockcycles +rtl_file_list+$rtlfilelist +tb_file_list+$tbfilelist +bp+$bp +fifo+$fifo +post_process+$pps "; |
} else { |
print "Zenity ERROR. Form not entered correctly!"; |
} |
|
if ( $cmmu =~ m/Y/ ) { $command .= " +cmmu_en "; } |
if ( $seed =~ m/^\s*[0-9]+\s*$/ ) { $command .= " +seed+$seed"; } |
if ( $sim =~ m/Y/ ) { $command .= " +sim "; } |
if ( $cmmu =~ m/Y/ ) { |
$command .= " +cmmu_en "; |
$command .= " +cache_size+$csize "; |
$command .= " +dtlb+$dtlb "; |
$command .= " +itlb+$itlb "; |
} |
if ( $irq =~ m/Y/ ) { $command .= " +irq_en "; } |
if ( $fiq =~ m/Y/ ) { $command .= " +fiq_en "; } |
if ( $tlbdebug =~ m/Y/ ) { $command .= " +tlbdebug "; } |
if ( $genvcd !~ m/Y/ ) { $command .= " +nodump "; } |
|
$command .= ";cat"; |
print "$command\n"; |
exec "xterm -e '$command'"; |