OpenCores
URL https://opencores.org/ocsvn/zipcpu/zipcpu/trunk

Subversion Repositories zipcpu

Compare Revisions

  • This comparison shows the changes necessary to convert path
    /
    from Rev 191 to Rev 190
    Reverse comparison

Rev 191 → Rev 190

/zipcpu/trunk/sw/gcc-zippatch.patch
138,7 → 138,7
+
+struct gcc_targetm_common targetm_common = TARGETM_COMMON_INITIALIZER;
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/aarch64/aarch64-linux.h gcc-5.3.0-zip/gcc/config/aarch64/aarch64-linux.h
--- gcc-5.3.0-original/gcc/config/aarch64/aarch64-linux.h 2016-10-19 11:02:11.471843057 -0400
--- gcc-5.3.0-original/gcc/config/aarch64/aarch64-linux.h 2016-09-13 10:23:45.886099269 -0400
+++ gcc-5.3.0-zip/gcc/config/aarch64/aarch64-linux.h 2015-07-24 12:00:26.000000000 -0400
@@ -21,7 +21,7 @@
#ifndef GCC_AARCH64_LINUX_H
150,7 → 150,7
#undef ASAN_CC1_SPEC
#define ASAN_CC1_SPEC "%{%:sanitize(address):-funwind-tables}"
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/alpha/linux-elf.h gcc-5.3.0-zip/gcc/config/alpha/linux-elf.h
--- gcc-5.3.0-original/gcc/config/alpha/linux-elf.h 2016-10-19 11:02:11.783840959 -0400
--- gcc-5.3.0-original/gcc/config/alpha/linux-elf.h 2016-09-13 10:23:45.886099269 -0400
+++ gcc-5.3.0-zip/gcc/config/alpha/linux-elf.h 2015-01-05 07:33:28.000000000 -0500
@@ -23,8 +23,8 @@
#define EXTRA_SPECS \
164,7 → 164,7
#define CHOOSE_DYNAMIC_LINKER(G, U) "%{mglibc:" G ";:" U "}"
#elif DEFAULT_LIBC == LIBC_GLIBC
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/arm/linux-eabi.h gcc-5.3.0-zip/gcc/config/arm/linux-eabi.h
--- gcc-5.3.0-original/gcc/config/arm/linux-eabi.h 2016-10-19 11:02:11.783840959 -0400
--- gcc-5.3.0-original/gcc/config/arm/linux-eabi.h 2016-09-13 10:23:45.886099269 -0400
+++ gcc-5.3.0-zip/gcc/config/arm/linux-eabi.h 2015-01-05 07:33:28.000000000 -0500
@@ -68,8 +68,8 @@
GLIBC_DYNAMIC_LINKER_DEFAULT and TARGET_DEFAULT_FLOAT_ABI. */
178,7 → 178,7
#define GLIBC_DYNAMIC_LINKER \
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/arm/linux-elf.h gcc-5.3.0-zip/gcc/config/arm/linux-elf.h
--- gcc-5.3.0-original/gcc/config/arm/linux-elf.h 2016-10-19 11:02:11.783840959 -0400
--- gcc-5.3.0-original/gcc/config/arm/linux-elf.h 2016-09-13 10:23:45.886099269 -0400
+++ gcc-5.3.0-zip/gcc/config/arm/linux-elf.h 2015-06-23 05:26:54.000000000 -0400
@@ -62,7 +62,7 @@
190,7 → 190,7
#define LINUX_TARGET_LINK_SPEC "%{h*} \
%{static:-Bstatic} \
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/bfin/linux.h gcc-5.3.0-zip/gcc/config/bfin/linux.h
--- gcc-5.3.0-original/gcc/config/bfin/linux.h 2016-10-19 11:02:11.783840959 -0400
--- gcc-5.3.0-original/gcc/config/bfin/linux.h 2016-09-13 10:23:45.886099269 -0400
+++ gcc-5.3.0-zip/gcc/config/bfin/linux.h 2015-01-05 07:33:28.000000000 -0500
@@ -45,7 +45,7 @@
%{shared:-G -Bdynamic} \
202,7 → 202,7
#undef TARGET_SUPPORTS_SYNC_CALLS
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/cris/linux.h gcc-5.3.0-zip/gcc/config/cris/linux.h
--- gcc-5.3.0-original/gcc/config/cris/linux.h 2016-10-19 11:02:11.783840959 -0400
--- gcc-5.3.0-original/gcc/config/cris/linux.h 2016-09-13 10:23:45.886099269 -0400
+++ gcc-5.3.0-zip/gcc/config/cris/linux.h 2015-01-05 07:33:28.000000000 -0500
@@ -102,7 +102,7 @@
#undef CRIS_DEFAULT_CPU_VERSION
214,7 → 214,7
#undef CRIS_LINK_SUBTARGET_SPEC
#define CRIS_LINK_SUBTARGET_SPEC \
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/freebsd-spec.h gcc-5.3.0-zip/gcc/config/freebsd-spec.h
--- gcc-5.3.0-original/gcc/config/freebsd-spec.h 2016-10-19 11:02:11.783840959 -0400
--- gcc-5.3.0-original/gcc/config/freebsd-spec.h 2016-09-13 10:23:45.886099269 -0400
+++ gcc-5.3.0-zip/gcc/config/freebsd-spec.h 2015-06-25 13:53:14.000000000 -0400
@@ -129,9 +129,9 @@
#endif
229,7 → 229,7
/* NOTE: The freebsd-spec.h header is included also for various
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/frv/linux.h gcc-5.3.0-zip/gcc/config/frv/linux.h
--- gcc-5.3.0-original/gcc/config/frv/linux.h 2016-10-19 11:02:11.783840959 -0400
--- gcc-5.3.0-original/gcc/config/frv/linux.h 2016-09-13 10:23:45.886099269 -0400
+++ gcc-5.3.0-zip/gcc/config/frv/linux.h 2015-01-05 07:33:28.000000000 -0500
@@ -34,7 +34,7 @@
#define ENDFILE_SPEC \
241,7 → 241,7
#undef LINK_SPEC
#define LINK_SPEC "\
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/i386/gnu.h gcc-5.3.0-zip/gcc/config/i386/gnu.h
--- gcc-5.3.0-original/gcc/config/i386/gnu.h 2016-10-19 11:02:11.783840959 -0400
--- gcc-5.3.0-original/gcc/config/i386/gnu.h 2016-09-13 10:23:45.886099269 -0400
+++ gcc-5.3.0-zip/gcc/config/i386/gnu.h 2015-01-05 07:33:28.000000000 -0500
@@ -22,7 +22,7 @@
#define GNU_USER_LINK_EMULATION "elf_i386"
253,7 → 253,7
#undef STARTFILE_SPEC
#if defined HAVE_LD_PIE
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/i386/kfreebsd-gnu64.h gcc-5.3.0-zip/gcc/config/i386/kfreebsd-gnu64.h
--- gcc-5.3.0-original/gcc/config/i386/kfreebsd-gnu64.h 2016-10-19 11:02:11.783840959 -0400
--- gcc-5.3.0-original/gcc/config/i386/kfreebsd-gnu64.h 2016-09-13 10:23:45.890099248 -0400
+++ gcc-5.3.0-zip/gcc/config/i386/kfreebsd-gnu64.h 2015-01-05 07:33:28.000000000 -0500
@@ -22,6 +22,6 @@
#define GNU_USER_LINK_EMULATION64 "elf_x86_64_fbsd"
266,7 → 266,7
+#define GLIBC_DYNAMIC_LINKER64 "/lib/ld-kfreebsd-x86-64.so.1"
+#define GLIBC_DYNAMIC_LINKERX32 "/lib/ld-kfreebsd-x32.so.1"
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/i386/kfreebsd-gnu.h gcc-5.3.0-zip/gcc/config/i386/kfreebsd-gnu.h
--- gcc-5.3.0-original/gcc/config/i386/kfreebsd-gnu.h 2016-10-19 11:02:11.783840959 -0400
--- gcc-5.3.0-original/gcc/config/i386/kfreebsd-gnu.h 2016-09-13 10:23:45.886099269 -0400
+++ gcc-5.3.0-zip/gcc/config/i386/kfreebsd-gnu.h 2015-01-05 07:33:28.000000000 -0500
@@ -19,4 +19,4 @@
<http://www.gnu.org/licenses/>. */
275,7 → 275,7
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld.so.1"
+#define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1"
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/i386/linux64.h gcc-5.3.0-zip/gcc/config/i386/linux64.h
--- gcc-5.3.0-original/gcc/config/i386/linux64.h 2016-10-19 11:02:11.783840959 -0400
--- gcc-5.3.0-original/gcc/config/i386/linux64.h 2016-09-13 10:23:45.890099248 -0400
+++ gcc-5.3.0-zip/gcc/config/i386/linux64.h 2015-01-05 07:33:28.000000000 -0500
@@ -27,6 +27,6 @@
#define GNU_USER_LINK_EMULATION64 "elf_x86_64"
288,7 → 288,7
+#define GLIBC_DYNAMIC_LINKER64 "/lib64/ld-linux-x86-64.so.2"
+#define GLIBC_DYNAMIC_LINKERX32 "/libx32/ld-linux-x32.so.2"
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/i386/linux.h gcc-5.3.0-zip/gcc/config/i386/linux.h
--- gcc-5.3.0-original/gcc/config/i386/linux.h 2016-10-19 11:02:11.783840959 -0400
--- gcc-5.3.0-original/gcc/config/i386/linux.h 2016-09-13 10:23:45.890099248 -0400
+++ gcc-5.3.0-zip/gcc/config/i386/linux.h 2015-01-05 07:33:28.000000000 -0500
@@ -20,4 +20,4 @@
<http://www.gnu.org/licenses/>. */
297,7 → 297,7
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld-linux.so.2"
+#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux.so.2"
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/ia64/linux.h gcc-5.3.0-zip/gcc/config/ia64/linux.h
--- gcc-5.3.0-original/gcc/config/ia64/linux.h 2016-10-19 11:02:11.783840959 -0400
--- gcc-5.3.0-original/gcc/config/ia64/linux.h 2016-09-13 10:23:45.890099248 -0400
+++ gcc-5.3.0-zip/gcc/config/ia64/linux.h 2015-01-05 07:33:28.000000000 -0500
@@ -55,7 +55,7 @@
/* Define this for shared library support because it isn't in the main
309,7 → 309,7
#undef LINK_SPEC
#define LINK_SPEC "\
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/knetbsd-gnu.h gcc-5.3.0-zip/gcc/config/knetbsd-gnu.h
--- gcc-5.3.0-original/gcc/config/knetbsd-gnu.h 2016-10-19 11:02:11.783840959 -0400
--- gcc-5.3.0-original/gcc/config/knetbsd-gnu.h 2016-09-13 10:23:45.890099248 -0400
+++ gcc-5.3.0-zip/gcc/config/knetbsd-gnu.h 2015-01-05 07:33:28.000000000 -0500
@@ -32,4 +32,4 @@
318,7 → 318,7
-#define GNU_USER_DYNAMIC_LINKER "/tools/lib/ld.so.1"
+#define GNU_USER_DYNAMIC_LINKER "/lib/ld.so.1"
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/kopensolaris-gnu.h gcc-5.3.0-zip/gcc/config/kopensolaris-gnu.h
--- gcc-5.3.0-original/gcc/config/kopensolaris-gnu.h 2016-10-19 11:02:11.783840959 -0400
--- gcc-5.3.0-original/gcc/config/kopensolaris-gnu.h 2016-09-13 10:23:45.890099248 -0400
+++ gcc-5.3.0-zip/gcc/config/kopensolaris-gnu.h 2015-01-05 07:33:28.000000000 -0500
@@ -31,5 +31,4 @@
while (0)
328,7 → 328,7
-
+#define GNU_USER_DYNAMIC_LINKER "/lib/ld.so.1"
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/linux.h gcc-5.3.0-zip/gcc/config/linux.h
--- gcc-5.3.0-original/gcc/config/linux.h 2016-10-19 11:02:11.783840959 -0400
--- gcc-5.3.0-original/gcc/config/linux.h 2016-09-13 10:23:45.890099248 -0400
+++ gcc-5.3.0-zip/gcc/config/linux.h 2015-01-05 07:33:28.000000000 -0500
@@ -73,10 +73,10 @@
GLIBC_DYNAMIC_LINKER must be defined for each target using them, or
346,7 → 346,7
#define BIONIC_DYNAMIC_LINKER32 "/system/bin/linker"
#define BIONIC_DYNAMIC_LINKER64 "/system/bin/linker64"
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/lm32/uclinux-elf.h gcc-5.3.0-zip/gcc/config/lm32/uclinux-elf.h
--- gcc-5.3.0-original/gcc/config/lm32/uclinux-elf.h 2016-10-19 11:02:11.787840932 -0400
--- gcc-5.3.0-original/gcc/config/lm32/uclinux-elf.h 2016-09-13 10:23:45.890099248 -0400
+++ gcc-5.3.0-zip/gcc/config/lm32/uclinux-elf.h 2015-01-05 07:33:28.000000000 -0500
@@ -67,7 +67,7 @@
%{shared:-shared} \
358,7 → 358,7
#define TARGET_OS_CPP_BUILTINS() GNU_USER_TARGET_OS_CPP_BUILTINS()
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/m68k/linux.h gcc-5.3.0-zip/gcc/config/m68k/linux.h
--- gcc-5.3.0-original/gcc/config/m68k/linux.h 2016-10-19 11:02:11.787840932 -0400
--- gcc-5.3.0-original/gcc/config/m68k/linux.h 2016-09-13 10:23:45.890099248 -0400
+++ gcc-5.3.0-zip/gcc/config/m68k/linux.h 2015-01-05 07:33:28.000000000 -0500
@@ -71,7 +71,7 @@
When the -shared link option is used a final link is not being
370,7 → 370,7
#undef LINK_SPEC
#define LINK_SPEC "-m m68kelf %{shared} \
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/microblaze/linux.h gcc-5.3.0-zip/gcc/config/microblaze/linux.h
--- gcc-5.3.0-original/gcc/config/microblaze/linux.h 2016-10-19 11:02:11.787840932 -0400
--- gcc-5.3.0-original/gcc/config/microblaze/linux.h 2016-09-13 10:23:45.890099248 -0400
+++ gcc-5.3.0-zip/gcc/config/microblaze/linux.h 2015-05-28 10:08:19.000000000 -0400
@@ -28,7 +28,7 @@
#undef TLS_NEEDS_GOT
382,7 → 382,7
#define SUBTARGET_EXTRA_SPECS \
{ "dynamic_linker", DYNAMIC_LINKER }
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/mips/linux.h gcc-5.3.0-zip/gcc/config/mips/linux.h
--- gcc-5.3.0-original/gcc/config/mips/linux.h 2016-10-19 11:02:11.787840932 -0400
--- gcc-5.3.0-original/gcc/config/mips/linux.h 2016-09-13 10:23:45.890099248 -0400
+++ gcc-5.3.0-zip/gcc/config/mips/linux.h 2015-01-05 07:33:28.000000000 -0500
@@ -22,20 +22,20 @@
#define GNU_USER_LINK_EMULATIONN32 "elf32%{EB:b}%{EL:l}tsmipn32"
412,7 → 412,7
#define BIONIC_DYNAMIC_LINKERN32 "/system/bin/linker32"
#define GNU_USER_DYNAMIC_LINKERN32 \
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/mn10300/linux.h gcc-5.3.0-zip/gcc/config/mn10300/linux.h
--- gcc-5.3.0-original/gcc/config/mn10300/linux.h 2016-10-19 11:02:11.787840932 -0400
--- gcc-5.3.0-original/gcc/config/mn10300/linux.h 2016-09-13 10:23:45.890099248 -0400
+++ gcc-5.3.0-zip/gcc/config/mn10300/linux.h 2015-01-05 07:33:28.000000000 -0500
@@ -32,7 +32,7 @@
#undef ASM_SPEC
424,7 → 424,7
#undef LINK_SPEC
#define LINK_SPEC "%{mrelax:--relax} %{shared:-shared} \
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/pa/pa-linux.h gcc-5.3.0-zip/gcc/config/pa/pa-linux.h
--- gcc-5.3.0-original/gcc/config/pa/pa-linux.h 2016-10-19 11:02:11.787840932 -0400
--- gcc-5.3.0-original/gcc/config/pa/pa-linux.h 2016-09-13 10:23:45.890099248 -0400
+++ gcc-5.3.0-zip/gcc/config/pa/pa-linux.h 2015-09-24 20:04:26.000000000 -0400
@@ -37,7 +37,7 @@
/* Define this for shared library support because it isn't in the main
436,7 → 436,7
#undef LINK_SPEC
#define LINK_SPEC "\
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/rs6000/linux64.h gcc-5.3.0-zip/gcc/config/rs6000/linux64.h
--- gcc-5.3.0-original/gcc/config/rs6000/linux64.h 2016-10-19 11:02:11.787840932 -0400
--- gcc-5.3.0-original/gcc/config/rs6000/linux64.h 2016-09-13 10:23:45.890099248 -0400
+++ gcc-5.3.0-zip/gcc/config/rs6000/linux64.h 2015-03-09 19:18:57.000000000 -0400
@@ -357,14 +357,14 @@
#undef LINK_OS_DEFAULT_SPEC
459,7 → 459,7
#define CHOOSE_DYNAMIC_LINKER(G, U) "%{mglibc:" G ";:" U "}"
#elif DEFAULT_LIBC == LIBC_GLIBC
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/rs6000/sysv4.h gcc-5.3.0-zip/gcc/config/rs6000/sysv4.h
--- gcc-5.3.0-original/gcc/config/rs6000/sysv4.h 2016-10-19 11:02:11.891840233 -0400
--- gcc-5.3.0-original/gcc/config/rs6000/sysv4.h 2016-09-13 10:23:45.890099248 -0400
+++ gcc-5.3.0-zip/gcc/config/rs6000/sysv4.h 2015-09-24 09:46:45.000000000 -0400
@@ -757,8 +757,8 @@
473,7 → 473,7
#define CHOOSE_DYNAMIC_LINKER(G, U) "%{mglibc:" G ";:" U "}"
#elif !defined (DEFAULT_LIBC) || DEFAULT_LIBC == LIBC_GLIBC
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/s390/linux.h gcc-5.3.0-zip/gcc/config/s390/linux.h
--- gcc-5.3.0-original/gcc/config/s390/linux.h 2016-10-19 11:02:11.891840233 -0400
--- gcc-5.3.0-original/gcc/config/s390/linux.h 2016-09-13 10:23:45.890099248 -0400
+++ gcc-5.3.0-zip/gcc/config/s390/linux.h 2015-05-11 03:14:10.000000000 -0400
@@ -60,8 +60,8 @@
#define MULTILIB_DEFAULTS { "m31" }
487,7 → 487,7
#undef LINK_SPEC
#define LINK_SPEC \
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/sh/linux.h gcc-5.3.0-zip/gcc/config/sh/linux.h
--- gcc-5.3.0-original/gcc/config/sh/linux.h 2016-10-19 11:02:11.891840233 -0400
--- gcc-5.3.0-original/gcc/config/sh/linux.h 2016-09-13 10:23:45.890099248 -0400
+++ gcc-5.3.0-zip/gcc/config/sh/linux.h 2015-01-05 07:33:28.000000000 -0500
@@ -43,7 +43,7 @@
499,7 → 499,7
#undef SUBTARGET_LINK_EMUL_SUFFIX
#define SUBTARGET_LINK_EMUL_SUFFIX "_linux"
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/sparc/linux64.h gcc-5.3.0-zip/gcc/config/sparc/linux64.h
--- gcc-5.3.0-original/gcc/config/sparc/linux64.h 2016-10-19 11:02:12.023839345 -0400
--- gcc-5.3.0-original/gcc/config/sparc/linux64.h 2016-09-13 10:23:45.890099248 -0400
+++ gcc-5.3.0-zip/gcc/config/sparc/linux64.h 2015-01-05 07:33:28.000000000 -0500
@@ -84,8 +84,8 @@
When the -shared link option is used a final link is not being
522,7 → 522,7
%{!static: \
%{rdynamic:-export-dynamic} \
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/sparc/linux.h gcc-5.3.0-zip/gcc/config/sparc/linux.h
--- gcc-5.3.0-original/gcc/config/sparc/linux.h 2016-10-19 11:02:12.023839345 -0400
--- gcc-5.3.0-original/gcc/config/sparc/linux.h 2016-09-13 10:23:45.890099248 -0400
+++ gcc-5.3.0-zip/gcc/config/sparc/linux.h 2015-01-05 07:33:28.000000000 -0500
@@ -83,7 +83,7 @@
When the -shared link option is used a final link is not being
534,7 → 534,7
#undef LINK_SPEC
#define LINK_SPEC "-m elf32_sparc %{shared:-shared} \
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/vax/linux.h gcc-5.3.0-zip/gcc/config/vax/linux.h
--- gcc-5.3.0-original/gcc/config/vax/linux.h 2016-10-19 11:02:12.023839345 -0400
--- gcc-5.3.0-original/gcc/config/vax/linux.h 2016-09-13 10:23:45.890099248 -0400
+++ gcc-5.3.0-zip/gcc/config/vax/linux.h 2015-01-05 07:33:28.000000000 -0500
@@ -41,7 +41,7 @@
%{!shared: \
546,7 → 546,7
#undef WCHAR_TYPE
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/xtensa/linux.h gcc-5.3.0-zip/gcc/config/xtensa/linux.h
--- gcc-5.3.0-original/gcc/config/xtensa/linux.h 2016-10-19 11:02:12.023839345 -0400
--- gcc-5.3.0-original/gcc/config/xtensa/linux.h 2016-09-13 10:23:45.890099248 -0400
+++ gcc-5.3.0-zip/gcc/config/xtensa/linux.h 2015-01-05 07:33:28.000000000 -0500
@@ -44,7 +44,7 @@
%{mlongcalls:--longcalls} \
706,8 → 706,8
+
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/zip/zip.c gcc-5.3.0-zip/gcc/config/zip/zip.c
--- gcc-5.3.0-original/gcc/config/zip/zip.c 1969-12-31 19:00:00.000000000 -0500
+++ gcc-5.3.0-zip/gcc/config/zip/zip.c 2016-09-13 15:36:22.342322803 -0400
@@ -0,0 +1,2291 @@
+++ gcc-5.3.0-zip/gcc/config/zip/zip.c 2016-09-13 10:06:40.979536485 -0400
@@ -0,0 +1,2151 @@
+////////////////////////////////////////////////////////////////////////////////
+//
+// Filename: zip.c
1380,67 → 1380,6
+ // RTX_FRAME_RELATED_P(insn) = 1;
+}
+
+void
+zip_sibcall_epilogue(void) {
+ int regno, offset;
+ const bool dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
+ rtx insn;
+
+ zip_compute_frame();
+
+ if (dbg) fprintf(stderr, "EPILOG::\n");
+ if (cfun->machine->fp_needed) {
+ // This is done special--if you can't trust the stack pointer
+ // enough so that you must have a frame pointer, then you can't
+ // trust its offset enough to restore from it. Hence, we start
+ // by moving the frame pointer to the stack pointer to recover
+ // the stack pointer back to a usable value.
+ if (dbg) fprintf(stderr, "SIBCALL-EPILOG::Moving frame pointer to stack register\n");
+ insn = emit_insn(gen_movsi_reg(stack_pointer_rtx, frame_pointer_rtx));
+ RTX_FRAME_RELATED_P(insn) = 1;
+ }
+
+ if (cfun->machine->saved_reg_size != 0) {
+ if (cfun->machine->fp_needed)
+ offset = 0;
+ else
+ offset = cfun->machine->sp_fp_offset;
+ if (dbg) fprintf(stderr, "SIBCALL-EPILOG::Saved_REG_Size = %d\n", cfun->machine->saved_reg_size);
+ for(regno=0; regno < FIRST_PSEUDO_REGISTER; regno++) {
+ if (zip_save_reg(regno)) {
+ if (dbg) fprintf(stderr, "SIBCALL-EPILOG::RESTORING R%d\n", regno);
+ rtx reg = gen_rtx_REG(SImode, regno);
+ insn = emit_insn(gen_movsi_lod_off(
+ reg,
+ stack_pointer_rtx,
+ GEN_INT(offset++)));
+ add_reg_note(insn, REG_CFA_RESTORE, reg);
+ RTX_FRAME_RELATED_P(insn) = 1;
+ }
+ }
+ }
+
+ if (cfun->machine->fp_needed) {
+ // Restore the stack pointer back to the original, the
+ // difference being the difference from the frame pointer
+ // to the original stack
+ insn = emit_insn(gen_addsi3_reg_clobber(stack_pointer_rtx,
+ stack_pointer_rtx,
+ GEN_INT(cfun->machine->size_for_adjusting_sp
+ -cfun->machine->sp_fp_offset)));
+ RTX_FRAME_RELATED_P(insn) = 1;
+ } else {
+ // else now the difference is between the stack pointer and
+ // the original stack pointer.
+ if (dbg) fprintf(stderr, "SIBCALL-EPILOG::ADDSI3(StackPtr, %d)\n",
+ cfun->machine->size_for_adjusting_sp);
+ insn = emit_insn(gen_addsi3_reg_clobber(stack_pointer_rtx,
+ stack_pointer_rtx,
+ GEN_INT(cfun->machine->size_for_adjusting_sp)));
+ RTX_FRAME_RELATED_P(insn) = 1;
+ }
+}
+
+/* Implement RETURN_ADDR_RTX(COUNT, FRAMEADDR).
+ *
+ * We currently only support calculating the return address for the current
1597,85 → 1536,6
+ gen_rtx_REG(mode, (*cum)+1);
+}
+
+/* DECL is the declaration of the function being targeted by the call, and EXP
+ * is the CALL_EXPR representing the call.
+ */
+bool zip_function_ok_for_sibcall(ATTRIBUTE_UNUSED tree decl, tree exp) {
+ // calls.c already checks whether or not the parameter stack space
+ // is identical, so ... let's hope this all works and find out.
+
+ //
+ // Actually, this will fail: If the sibling uses R5 to pass registers
+ // in and we don't, then there will be no way to restore R5. This is
+ // true for the current configuration. It will be true for future
+ // configurations if the sibling ever uses a register that must be
+ // saved as a parameter register.
+ //
+ // We can check this ... if we can count how many registers the
+ // sibling call will use.
+ //
+ CUMULATIVE_ARGS cum_v;
+ cumulative_args_t cum;
+ tree parameter;
+ machine_mode mode;
+ tree ttype;
+ rtx parm_rtx;
+ int i;
+ static const char zip_call_used_register[] = CALL_USED_REGISTERS;
+
+ INIT_CUMULATIVE_ARGS(cum_v, NULL, NULL, 0,0);
+ cum = pack_cumulative_args(&cum_v);
+ for (i=0; i<call_expr_nargs(exp); i++) {
+
+ parameter = CALL_EXPR_ARG(exp, i);
+
+ if ((!parameter) || (TREE_CODE(parameter)==ERROR_MARK))
+ return true;
+ ttype = TREE_TYPE(parameter);
+ gcc_assert(ttype);
+ mode = ttype->type_common.mode;
+
+ if (pass_by_reference(&cum_v, mode, ttype, true)) {
+ mode = Pmode;
+ ttype = build_pointer_type(ttype);
+ }
+
+ parm_rtx = zip_function_arg(cum, mode, ttype, 0);
+ zip_function_arg_advance(cum, mode, ttype, 0);
+ if (!parm_rtx)
+ continue;
+
+ // If it is a register
+ // and it is *NOT* a CALL_USED_REGISTER
+ // then we can't do this.
+ //
+ // Example: func(R1,..R4,R5)
+ // can be followed by func2(R1,.., up to R5)
+ // (not supported, though... just to simplify our test
+ // below)
+ // Example: func(R1,..R4)
+ // cannot be followed by func2(R1,..,R5)
+ // We would blow R5 away by our prologue, even if it was
+ // properly set.
+ // Example: func(R1,..R5)
+ // can be followed by func2(R1,.., up to R4)
+ // func2 may save R5 (which doesn't need saving) but that's
+ // irrelevant
+ // Example: func(R1,..up to R4)
+ // can be followed by func2(R1,.., up to R4)
+ //
+ if (REG_P(parm_rtx)&&(REGNO(parm_rtx))
+ &&(REGNO(parm_rtx)<sizeof(zip_call_used_register))
+ &&(!zip_call_used_register[REGNO(parm_rtx)]))
+ return false;
+ }
+
+ return true;
+
+ // We also need to check if the return types are the same ... or
+ // will GCC handle that for us?
+}
+
+void zip_canonicalize_comparison(int *code, rtx *op0, rtx *op1,
+ bool preserve_op0)
+{
3001,8 → 2861,8
+}
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/zip/zip.h gcc-5.3.0-zip/gcc/config/zip/zip.h
--- gcc-5.3.0-original/gcc/config/zip/zip.h 1969-12-31 19:00:00.000000000 -0500
+++ gcc-5.3.0-zip/gcc/config/zip/zip.h 2016-09-13 13:46:17.890711238 -0400
@@ -0,0 +1,4095 @@
+++ gcc-5.3.0-zip/gcc/config/zip/zip.h 2016-09-13 10:05:21.871953479 -0400
@@ -0,0 +1,4058 @@
+////////////////////////////////////////////////////////////////////////////////
+//
+// Filename: gcc/config/zip/zip.h
4893,7 → 4753,7
+#define ACCUMULATE_OUTGOING_ARGS 1
+
+
+/* REG_PARM_STACK_SPACE(FN) ... Define this macro if functions should assume
+/* REG_PARM_STACK_SPACCE(FN) ... Define this macro if functions should assume
+ * that stack space has been allocated for arguments even when their values
+ * are passed in registers. The value of this macro is the size, in bytes, of
+ * the area reserved for arguments passed in registers for the function
5263,45 → 5123,13
+ * successful sibling call optimization may vary greatly between different
+ * architectures.
+ *
+ * What's a sibling call? "Sibling calls or tail calls terminate the function
+ * in a nonn-standard way and thus an edge to the exit must be present.
+ * EDGE_SIBCALL and EDGE_ABNORMAL are set in such case(s). These edges only
+ * exist in the RTL representation.
+ *
+ * So, basically, a sibling call is a function call at the end of one function.
+ * Rather than setting up a new stack frame, return address, etc, it is
+ * possible to just jump to this new function, leaving the return address for
+ * the prior function as the (now) return address for this one.
+ *
+ * ZipCPU --- These are good things. We wish to support them. We will require,
+ * though, that the sibling require no more stack space than the original.
+ * We might go even stricter, requiring that the sibling require no stack space
+ * at all--and only register variables.
+ * ?? What's a sibling call?
+ */
+#define TARGET_FUNCTION_OK_FOR_SIBCALL zip_function_ok_for_sibcall
+
+/* TARGET_EXTRA_LIVE_ON_ENTRY(REGS) ... Add any hard registers to regs that are
+ * live on entry to the function. This hook only needs to be defined to provide
+ * registers that cannot be found by examination of FUNTION_ARG_REGNO_P, the
+ * ... and the ...
+ *
+ * ZipCPU -- the default should be good enough for us.
+ */
+/* TARGET_SET_UP_BY_PROLOGUE(CONTAINER) ... This hook should add additional
+ * registers that are computed by the prologue to the hard register set for
+ * shrink-wrapping optimization purposes.
+ *
+ * ??
+ */
+// TARGET_EXTRA_LIVE_ON_ENTRY
+// TARGET_SET_UP_BY_PROLOGUE
+// TARGET_WARN_FUNC_RETURN
+
+/* TARGET_WARN_FUNC_RETURN(TREE) ... True if a function's return statements
+ * should be checked for matching the function's return type. This includes
+ * checking for falling off the end of a non-void function. Return false if
+ * no such check should be made.
+ *
+ * ZipCPU--the default should be good enough for us.
+ */
+
+/* 17.09.14 Stack smashing protection */
+// TARGET_STACK_PROTECT_GUARD
+// TARGET_STACK_PROTECT_FAIL
5724,14 → 5552,9
+ *
+ * ZipCPU --- We need this, as not all expressions set (cc0).
+ *
+ * In hind sight, this is the *old* and unsupported way of doing business within
+ * GCC. To switch to the new way, all instruction definitions within our .md
+ * file have been adjusted to either change or clobber the CC register.
+ *
+ */
+#ifdef HAVE_cc0
+// #define NOTICE_UPDATE_CC(EXP, INSN) zip_update_cc_notice(EXP, INSN)
+#error "ZipCPU no longer has CC0"
+#define NOTICE_UPDATE_CC(EXP, INSN) zip_update_cc_notice(EXP, INSN)
+#endif
+
+
7100,8 → 6923,8
+
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/zip/zip.md gcc-5.3.0-zip/gcc/config/zip/zip.md
--- gcc-5.3.0-original/gcc/config/zip/zip.md 1969-12-31 19:00:00.000000000 -0500
+++ gcc-5.3.0-zip/gcc/config/zip/zip.md 2016-09-15 11:37:25.730251033 -0400
@@ -0,0 +1,3463 @@
+++ gcc-5.3.0-zip/gcc/config/zip/zip.md 2016-08-08 07:07:39.251163261 -0400
@@ -0,0 +1,3254 @@
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Filename: zip.md
8854,7 → 8677,7
+ })
+(define_insn_and_split "movsicc_bare"
+ [(set (match_operand:SI 0 "register_operand" "=r")
+ (if_then_else:SI (match_operator 1 "ordered_comparison_operator"
+ (if_then_else (match_operator 1 "ordered_comparison_operator"
+ [(reg:CC CC_REG) (const_int 0)])
+ (match_operand:SI 2 "general_operand" "rio")
+ (match_operand:SI 3 "register_operand" "0")))]
9253,55 → 9076,6
+;
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Looping constructs
+;;
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;
+;
+;
+(define_insn "decrement_and_branch_until_zero"
+ [(set (pc)
+ (if_then_else
+ (ge (plus:SI (match_operand:SI 0 "register_operand" "+r")
+ (const_int -1)) (const_int 0))
+ (label_ref (match_operand 1 "" ""))
+ (pc)))
+ (set (match_dup 0) (plus:SI (match_dup 0) (const_int -1)))
+ ;(set (reg:CC CC_REG)
+ ;(compare:CC (minus:SI (match_dup 0) (const_int 1))
+ ;(const_int 0)))
+ (clobber (reg:CC CC_REG))]
+ ""
+ "ADD\t-1,%0\n\tBLT\t.Ldec%=\n\tBRA\t%1\n.Ldec%=:"
+ [(set_attr "predicable" "no") (set_attr "ccresult" "unknown")])
+;
+;
+(define_insn "doloop_end"
+ [(set (pc)
+ (if_then_else
+ (ne (plus:SI (match_operand:SI 0 "register_operand" "+r")
+ (const_int -1)) (const_int 0))
+ (label_ref (match_operand 1 "" ""))
+ (pc)))
+ (set (match_dup 0) (plus:SI (match_dup 0) (const_int -1)))
+ ; (set (reg:CC CC_REG)
+ ; (compare:CC (minus:SI (match_dup 0) (const_int 1))
+ ; (const_int 0)))
+ (clobber (reg:CC CC_REG))]
+ "(reload_completed)"
+ "ADD\t-1,%0\n\tBZ\t.Lloop%=\n\tBRA\t%1\n.Lloop%=:"
+ [(set_attr "predicable" "no") (set_attr "ccresult" "unknown")])
+;
+; Since we have a doloop_end, we must also have a doloop_begin. Since the
+; ZipCPU has no special begin looping instruction, we'll simply define this
+; as a null instruction.
+(define_expand "doloop_begin" [(const_int 0)] "(0)")
+;
+;
+;
+;
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Subroutine call
+;;
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
9351,91 → 9125,8
+ }
+ })
+;
+(define_expand "sibcall"
+ [(call (mem:SI (match_operand 0 "zip_const_address_operand_p" ""))
+ (match_operand 1 "" ""))
+ (use (match_operand 2 "" ""))
+ (use (reg:SI RTN_REG))
+ (simple_return)]
+ ""
+ {
+ if (MEM_P(operands[0])) {
+ // This should always be the case
+ rtx addr = XEXP(operands[0],0);
+ if (zip_const_address_operand_p(addr, SImode)) {
+ //; fprintf(stderr, "Generating gen_void_call_const()\n");
+ emit_call_insn(gen_void_sibcall_const(addr,
+ operands[1]));
+ } else if ((MEM_P(addr))&&(zip_address_operand(
+ XEXP(addr,0)))) {
+ emit_call_insn(gen_void_sibcall_mem(XEXP(addr,0),
+ operands[1]));
+ } else {
+ emit_call_insn(gen_void_sibcall_var(addr,
+ operands[1]));
+ }
+ DONE;
+ }
+ }) ; "BAR\t%0\n"
+;
+(define_insn "void_sibcall_const"
+ [(call (mem:SI (match_operand:SI 0 "zip_const_address_operand_p" ""))
+ (match_operand 1 "const_int_operand" "n"))
+ (use (reg:SI RTN_REG))
+ (clobber (reg:CC CC_REG))
+ (simple_return)]
+ ""
+ "BRA\t%0"
+ [(set_attr "predicable" "no") (set_attr "ccresult" "unknown")])
+(define_insn "void_sibcall_mem"
+ [(call (mem:SI (match_operand:SI 0 "zip_memory_operand_p" "Q"))
+ (match_operand 1 "const_int_operand" "n"))
+ (use (reg:SI RTN_REG))
+ (clobber (reg:CC CC_REG))
+ (simple_return)]
+ ""
+ "LOD\t%0,PC"
+ [(set_attr "predicable" "no") (set_attr "ccresult" "unknown")])
+;
+; #warning "This predicate is appropriate for non-moves, but not for JMPs"
+(define_insn "void_sibcall_var"
+ [(call (mem:SI (match_operand:SI 0 "zip_address_operand_p" ""))
+ (match_operand 1 "const_int_operand" "n"))
+ (use (reg:SI RTN_REG))
+ (clobber (reg:CC CC_REG))
+ (simple_return)]
+ ""
+ "JMP\t%0"
+ [(set_attr "predicable" "no") (set_attr "ccresult" "unknown")])
+;
+(define_expand "sibcall_value"
+ [(set (match_operand 0 "register_operand" "")
+ (call (mem:SI
+ (match_operand 1 "zip_const_address_operand_p" ""))
+ (match_operand 2 "" "")))
+ (use (match_operand 3 "" ""))
+ (use (reg:SI RTN_REG))
+ (clobber (reg:CC CC_REG))
+ (simple_return)]
+ ""
+ {
+ if (MEM_P(operands[1])) {
+ rtx addr = XEXP(operands[1],0);
+ if (zip_const_address_operand_p(addr, SImode)) {
+ emit_call_insn(gen_reg_sibcall_const(addr, operands[2]));
+ } else if ((MEM_P(addr))&&(zip_address_operand(XEXP(addr,0)))) {
+ emit_call_insn(gen_reg_sibcall_mem(XEXP(addr,0), operands[2]));
+ } else {
+ //; fprintf(stderr, "ZIP.MD::CALL-VALUE() INDIRECT\n");
+ emit_call_insn(gen_reg_sibcall_var(addr, operands[2]));
+ }
+ DONE;
+ }
+ })
+;
+;
+;
+;
+; How do we want to do this better?
+; Replace the RTL w/
+; return_label= gen_label_rtx();
9477,8 → 9168,6
+ ""
+ "MOV .Lcall%=(PC),R0\;JMP\t%0\n.Lcall%=:"
+ [(set_attr "predicable" "no") (set_attr "ccresult" "unknown")])
+;
+;
+(define_expand "call_value"
+ [(parallel [(set (reg:SI RTNV_REG)
+ (call (match_operand:SI 1 "" "")
9540,41 → 9229,6
+;
+;
+;
+(define_insn "reg_sibcall_const"
+ [(set (reg:SI RTNV_REG)
+ (call (mem:SI (match_operand:SI 0 "zip_const_address_operand_p" ""))
+ (match_operand 1 "const_int_operand" "n")))
+ (use (reg:SI RTN_REG))
+ (clobber (reg:CC CC_REG))
+ (simple_return)]
+ ""
+ "BRA\t%0"
+ [(set_attr "predicable" "no") (set_attr "ccresult" "unknown")])
+(define_insn "reg_sibcall_mem"
+ [(set (reg:SI RTNV_REG)
+ (call (mem:SI (match_operand:SI 0 "zip_memory_operand_p" "Q"))
+ (match_operand 1 "const_int_operand" "n")))
+ (use (reg:SI RTN_REG))
+ (clobber (reg:CC CC_REG))
+ (simple_return)]
+ ""
+ "LOD\t%0,PC"
+ [(set_attr "predicable" "no") (set_attr "ccresult" "unknown")])
+;
+; #warning "This predicate is appropriate for non-moves, but not for JMPs"
+(define_insn "reg_sibcall_var"
+ [(set (reg:SI RTNV_REG)
+ (call (mem:SI (match_operand:SI 0 "zip_address_operand_p" ""))
+ (match_operand 1 "const_int_operand" "n")))
+ (use (reg:SI RTN_REG))
+ (clobber (reg:CC CC_REG))
+ (simple_return)]
+ ""
+ "JMP\t%0"
+ [(set_attr "predicable" "no") (set_attr "ccresult" "unknown")])
+;
+;
+;
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Frame manipulation RTX
9587,10 → 9241,6
+ [(const_int 0)]
+ ""
+ "{ zip_expand_prologue(); DONE; }")
+(define_expand "sibcall_epilogue"
+ [(return)]
+ ""
+ "{ zip_sibcall_epilogue(); DONE; }")
+(define_expand "epilogue"
+ [(return)]
+ ""
9610,42 → 9260,6
+ ""
+ "JMP R0"
+ [(set_attr "ccresult" "unchanged")])
+(define_insn "return_if_eq"
+ [(set (pc) (if_then_else (eq (reg:CC CC_REG) (const_int 0))
+ (return) (pc)))]
+ "zip_use_return_insn()"
+ "JMP.Z R0"
+ [(set_attr "ccresult" "unchanged") (set_attr "predicable" "no")])
+(define_insn "return_if_ne"
+ [(set (pc) (if_then_else (ne (reg:CC CC_REG) (const_int 0))
+ (return) (pc)))]
+ "zip_use_return_insn()"
+ "JMP.NZ R0"
+ [(set_attr "ccresult" "unchanged") (set_attr "predicable" "no")])
+(define_insn "return_if_lt"
+ [(set (pc) (if_then_else (lt (reg:CC CC_REG) (const_int 0))
+ (return) (pc)))]
+ "zip_use_return_insn()"
+ "JMP.LT R0"
+ [(set_attr "ccresult" "unchanged") (set_attr "predicable" "no")])
+(define_insn "return_if_gt"
+ [(set (pc) (if_then_else (gt (reg:CC CC_REG) (const_int 0))
+ (return) (pc)))]
+ "zip_use_return_insn()"
+ "JMP.GT R0"
+ [(set_attr "ccresult" "unchanged") (set_attr "predicable" "no")])
+(define_insn "return_if_gte"
+ [(set (pc) (if_then_else (ge (reg:CC CC_REG) (const_int 0))
+ (return) (pc)))]
+ "zip_use_return_insn()"
+ "JMP.GTE R0"
+ [(set_attr "ccresult" "unchanged") (set_attr "predicable" "no")])
+(define_insn "return_if_ltu"
+ [(set (pc) (if_then_else (ltu (reg:CC CC_REG) (const_int 0))
+ (return) (pc)))]
+ "zip_use_return_insn()"
+ "JMP.C R0"
+ [(set_attr "ccresult" "unchanged") (set_attr "predicable" "no")])
+;
+;
+;
10594,8 → 10208,8
+// config directory.
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/zip/zip-protos.h gcc-5.3.0-zip/gcc/config/zip/zip-protos.h
--- gcc-5.3.0-original/gcc/config/zip/zip-protos.h 1969-12-31 19:00:00.000000000 -0500
+++ gcc-5.3.0-zip/gcc/config/zip/zip-protos.h 2016-09-13 15:32:55.403521585 -0400
@@ -0,0 +1,81 @@
+++ gcc-5.3.0-zip/gcc/config/zip/zip-protos.h 2016-05-09 11:16:54.734258166 -0400
@@ -0,0 +1,83 @@
+////////////////////////////////////////////////////////////////////////////////
+//
+// Filename: zip-protos.h
10637,7 → 10251,6
+extern bool zip_supported_condition(int c);
+extern void zip_expand_prologue(void);
+extern void zip_expand_epilogue(void);
+extern void zip_sibcall_epilogue(void);
+extern bool zip_expand_movsicc(rtx,rtx,rtx,rtx);
+extern int zip_initial_elimination_offset(int, int);
+extern void zip_print_operand(FILE *, rtx, int);
10648,8 → 10261,11
+
+extern void zip_asm_output_def(FILE *s, const char *n, const char *v);
+
+#ifdef HAVE_cc0
+extern void zip_update_cc_notice(rtx exp, rtx_insn *insn);
+#else
+extern void zip_canonicalize_comparison(int *, rtx *, rtx *, bool);
+extern bool zip_function_ok_for_sibcall(tree, tree);
+#endif
+extern int zip_address_operand(rtx op);
+extern int zip_const_address_operand(rtx op);
+extern bool zip_gen_move_rtl(rtx, rtx);
11295,79 → 10911,6
fmt = GET_RTX_FORMAT (code);
/* The primary target of a tablejump is the label of the ADDR_VEC,
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/loop-doloop.c gcc-5.3.0-zip/gcc/loop-doloop.c
--- gcc-5.3.0-original/gcc/loop-doloop.c 2015-01-15 08:28:42.000000000 -0500
+++ gcc-5.3.0-zip/gcc/loop-doloop.c 2016-09-13 12:12:36.248901944 -0400
@@ -62,6 +62,13 @@
#include "dumpfile.h"
#include "loop-unroll.h"
+// #define DO_ZIP_DEBUGS
+#ifdef DO_ZIP_DEBUGS
+extern void zip_debug_rtx(const_rtx);
+#define ZIP_DEBUG_LINE(STR,RTX) do{fprintf(stderr, "%s:%d/%s\n",__FILE__,__LINE__,STR); zip_debug_rtx(RTX); }while(0)
+#else
+#define ZIP_DEBUG_LINE(STR,RTX)
+#endif
/* This module is used to modify loops with a determinable number of
iterations to use special low-overhead looping instructions.
@@ -138,7 +145,7 @@
pattern = PATTERN (doloop_pat);
- if (GET_CODE (pattern) != PARALLEL)
+ if (GET_CODE (doloop_pat) != PARALLEL)
{
rtx cond;
rtx prev_insn = prev_nondebug_insn (doloop_pat);
@@ -186,10 +193,11 @@
}
else
{
- cmp = XVECEXP (pattern, 0, 0);
- inc = XVECEXP (pattern, 0, 1);
+ cmp = XVECEXP (doloop_pat, 0, 0);
+ inc = XVECEXP (doloop_pat, 0, 1);
}
+
/* Check for (set (reg) (something)). */
if (GET_CODE (inc) != SET)
return 0;
@@ -227,6 +235,7 @@
&& XEXP (condition, 1) != const1_rtx))
return 0;
+
if ((XEXP (condition, 0) == reg)
/* For the third case: */
|| ((cc_reg != NULL_RTX)
@@ -235,7 +244,7 @@
|| (GET_CODE (XEXP (condition, 0)) == PLUS
&& XEXP (XEXP (condition, 0), 0) == reg))
{
- if (GET_CODE (pattern) != PARALLEL)
+ if (GET_CODE (doloop_pat) != PARALLEL)
/* For the second form we expect:
(set (reg) (plus (reg) (const_int -1))
@@ -275,6 +284,7 @@
return condition;
}
+
/* ??? If a machine uses a funny comparison, we could return a
canonicalized form here. */
@@ -500,7 +510,6 @@
default:
gcc_unreachable ();
}
-
if (increment_count)
count = simplify_gen_binary (PLUS, mode, count, const1_rtx);
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/machmode.def gcc-5.3.0-zip/gcc/machmode.def
--- gcc-5.3.0-original/gcc/machmode.def 2015-01-05 07:33:28.000000000 -0500
+++ gcc-5.3.0-zip/gcc/machmode.def 2016-03-08 11:56:45.375491523 -0500
/zipcpu/trunk/sw/binutils-2.25.patch
238,7 → 238,7
diff -Naur '--exclude=*.swp' binutils-2.25-original/bfd/elf32-zip.c binutils-2.25/bfd/elf32-zip.c
--- binutils-2.25-original/bfd/elf32-zip.c 1969-12-31 19:00:00.000000000 -0500
+++ binutils-2.25/bfd/elf32-zip.c 2016-08-06 14:40:39.009138880 -0400
+++ binutils-2.25/bfd/elf32-zip.c 2016-07-11 15:39:08.365117055 -0400
@@ -0,0 +1,1303 @@
+////////////////////////////////////////////////////////////////////////////////
+//
470,7 → 470,7
+ 23, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_dont, /* don't complain_on_overflow */
+ complain_overflow_bitfield, /* complain_on_overflow */
+ zip_relocation, /* special_function */
+ "R_ZIP_LLO", /* name */
+ FALSE, /* partial_inplace */
2598,8 → 2598,8
optimize the copying in the simple case without using the
diff -Naur '--exclude=*.swp' binutils-2.25-original/gas/config/tc-zip.c binutils-2.25/gas/config/tc-zip.c
--- binutils-2.25-original/gas/config/tc-zip.c 1969-12-31 19:00:00.000000000 -0500
+++ binutils-2.25/gas/config/tc-zip.c 2016-09-15 09:31:15.907749200 -0400
@@ -0,0 +1,2610 @@
+++ binutils-2.25/gas/config/tc-zip.c 2016-07-15 11:00:12.695809274 -0400
@@ -0,0 +1,2431 @@
+////////////////////////////////////////////////////////////////////////////////
+//
+// Filename: tc-zip.c
2672,20 → 2672,6
+static int vliw_mergable = 0; // tc_check_label, tc_frob_label
+static int zip_param_got = 0, zip_param_vliw = 0;
+
+typedef struct {
+ int m_known;
+ int m_value;
+ symbolS *m_addsy, *m_subsy;
+} MACHINEVALUE;
+
+typedef struct {
+ MACHINEVALUE r[ZIP_USER_REGS];
+} MACHINEREGS;
+
+MACHINEREGS zipm;
+
+static void zip_clear_machine(MACHINEREGS *pzipm);
+
+void md_begin(void) {
+ vliw_mergable = 0;
+ //
2697,8 → 2683,6
+ // record_alignment(data_section, 2);
+ //
+ lex_type['('] = lex_type['A'];
+ //
+ zip_clear_machine(&zipm);
+}
+
+void md_end(void) { }
2794,123 → 2778,6
+ return r;
+}
+
+static void
+zip_clear_machine(MACHINEREGS *pzipm) {
+ int i;
+
+ for(i=0; i<ZIP_USER_REGS; i++)
+ pzipm->r[i].m_known = 0;
+ for(i=0; i<ZIP_USER_REGS; i++)
+ pzipm->r[i].m_addsy = 0;
+ for(i=0; i<ZIP_USER_REGS; i++)
+ pzipm->r[i].m_subsy = 0;
+}
+
+static void
+zip_advance_machine(MACHINEREGS *pzipm, ZIPIS *insn) {
+ int bval = insn->i_imm;
+ int bknown;
+
+ if (ZIP_RNONE == insn->i_breg)
+ bknown = 1;
+ else if (insn->i_breg >= ZIP_USER_REGS)
+ bknown = 0;
+ else
+ bknown = (pzipm->r[insn->i_breg].m_known);
+
+ if (insn->i_breg < ZIP_USER_REGS)
+ bval += pzipm->r[insn->i_breg].m_value;
+
+ if (insn->i_areg >= ZIP_USER_REGS)
+ return; // Nothing to do -- no change to machine
+ if (ZIPC_ALWAYS != insn->i_cnd) {
+ if ((ZIPO_LDILO == insn->i_code)
+ &&((pzipm->r[insn->i_areg].m_known == 1)
+ ||(pzipm->r[insn->i_areg].m_known == 2)))
+ pzipm->r[insn->i_areg].m_known = 2;
+ else
+ pzipm->r[insn->i_areg].m_known = 0;
+ } else if ((insn->i_rp)&&(insn->i_code != ZIPO_LDI)
+ &&(insn->i_code != ZIPO_MOV)) {
+ if ((ZIPO_TST != insn->i_op)&&(ZIPO_CMP != insn->i_op))
+ pzipm->r[insn->i_areg].m_known = 0;
+ } switch(insn->i_code) {
+ case ZIPO_SUB:
+ pzipm->r[insn->i_areg].m_known = (pzipm->r[insn->i_areg].m_known==1)?1:0;
+ pzipm->r[insn->i_areg].m_value -= bval;
+ if (bknown != 1)
+ pzipm->r[insn->i_areg].m_known = 0;
+ break;
+ case ZIPO_AND:
+ pzipm->r[insn->i_areg].m_value &= bval;
+ if ((bknown == 2)&&(insn->i_imm == 0)) {
+ if (pzipm->r[insn->i_areg].m_known == 1)
+ pzipm->r[insn->i_areg].m_known = 2;
+ else if (pzipm->r[insn->i_areg].m_known != 2)
+ pzipm->r[insn->i_areg].m_known = 0;
+ } else if (bknown != 1)
+ pzipm->r[insn->i_areg].m_known = 0;
+ break;
+ case ZIPO_ADD:
+ pzipm->r[insn->i_areg].m_known = (pzipm->r[insn->i_areg].m_known==1)?1:0;
+ pzipm->r[insn->i_areg].m_value += bval;
+ if (bknown != 1)
+ pzipm->r[insn->i_areg].m_known = 0;
+ break;
+ case ZIPO_OR:
+ pzipm->r[insn->i_areg].m_value |= bval;
+ if ((bknown == 2)&&(insn->i_imm == 0)) {
+ if (pzipm->r[insn->i_areg].m_known == 1)
+ pzipm->r[insn->i_areg].m_known = 2;
+ else if (pzipm->r[insn->i_areg].m_known != 2)
+ pzipm->r[insn->i_areg].m_known = 0;
+ } else if (bknown != 1)
+ pzipm->r[insn->i_areg].m_known = 0;
+ break;
+ case ZIPO_XOR:
+ pzipm->r[insn->i_areg].m_value ^= bval;
+ if ((bknown == 2)&&(insn->i_imm == 0)) {
+ if (pzipm->r[insn->i_areg].m_known == 1)
+ pzipm->r[insn->i_areg].m_known = 2;
+ else if (pzipm->r[insn->i_areg].m_known != 2)
+ pzipm->r[insn->i_areg].m_known = 0;
+ } else if (bknown != 1)
+ pzipm->r[insn->i_areg].m_known = 0;
+ break;
+ case ZIPO_LDI: case ZIPO_LDIn:
+ if (insn->i_rp)
+ pzipm->r[insn->i_areg].m_known = 0;
+ else {
+ pzipm->r[insn->i_areg].m_known = 1;
+ pzipm->r[insn->i_areg].m_value = insn->i_imm;
+ } break;
+ case ZIPO_LDILO:
+ pzipm->r[insn->i_areg].m_value &= ~0x0ffff;
+ pzipm->r[insn->i_areg].m_value |= insn->i_imm &0x0ffff;
+ break;
+ case ZIPO_BREV:
+ pzipm->r[insn->i_areg].m_value = zip_brev(bval);
+ pzipm->r[insn->i_areg].m_value = (bknown == 1);
+ break;
+ case ZIPO_MOV:
+ pzipm->r[insn->i_areg].m_known = ((insn->i_imm == 0)||(pzipm->r[insn->i_breg].m_known==1))?1:0;
+ pzipm->r[insn->i_areg].m_value = bval;
+ break;
+ case ZIPO_CLR: case ZIPO_CLRF:
+ pzipm->r[insn->i_areg].m_known = 1;
+ pzipm->r[insn->i_areg].m_value = 0;
+ break;
+ case ZIPO_NOOP: case ZIPO_BREAK: case ZIPO_LOCK:
+ case ZIPO_CMP: case ZIPO_TST:
+ break;
+ default:
+ pzipm->r[insn->i_areg].m_known = 0;
+ // zip_clear_machine(pzipm);
+ break;
+ }
+}
+
+
+/*
+ * Option processing
+ *
3007,10 → 2874,9
+zip_dump_sym(symbolS *sym)
+{
+ if (!sym) {
+ fprintf(stderr, "SYM(NULL)");
+ printf("SYM(NULL)");
+ } else {
+ fprintf(stderr, "Dumping symbol fields\n");
+ fprintf(stderr, "SYM(%s) %s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s - 0x%08x\n",
+ printf("SYM(%s) %s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s - 0x%08x\n",
+ S_GET_NAME(sym),
+ (S_IS_LOCAL(sym))?"Local ":"",
+ (S_IS_DEFINED(sym))?"Defined ":"",
3034,89 → 2900,89
+
+static void
+zip_dump_insn(ZIPIS *insn) {
+ fprintf(stderr, "INSN:DUMP ");
+ printf("INSN:DUMP ");
+ switch(insn->i_op) {
+ case ZIPO_SUB: fprintf(stderr, "%7s", "SUB"); break;
+ case ZIPO_AND: fprintf(stderr, "%7s", "AND"); break;
+ case ZIPO_ADD: fprintf(stderr, "%7s", "ADD"); break;
+ case ZIPO_OR: fprintf(stderr, "%7s", "OR"); break;
+ case ZIPO_XOR: fprintf(stderr, "%7s", "XOR"); break;
+ case ZIPO_LSR: fprintf(stderr, "%7s", "LSR"); break;
+ case ZIPO_LSL: fprintf(stderr, "%7s", "LSL"); break;
+ case ZIPO_ASR: fprintf(stderr, "%7s", "ASR"); break;
+ case ZIPO_LDI: fprintf(stderr, "%7s", "LDI"); break;
+ case ZIPO_SUB: printf("%7s", "SUB"); break;
+ case ZIPO_AND: printf("%7s", "AND"); break;
+ case ZIPO_ADD: printf("%7s", "ADD"); break;
+ case ZIPO_OR: printf("%7s", "OR"); break;
+ case ZIPO_XOR: printf("%7s", "XOR"); break;
+ case ZIPO_LSR: printf("%7s", "LSR"); break;
+ case ZIPO_LSL: printf("%7s", "LSL"); break;
+ case ZIPO_ASR: printf("%7s", "ASR"); break;
+ case ZIPO_LDI: printf("%7s", "LDI"); break;
+#ifdef LONG_MPY
+ case ZIPO_MPYUHI:fprintf(stderr, "%7s", "MPYUHI"); break;
+ case ZIPO_MPYSHI:fprintf(stderr, "%7s", "MPYSHI"); break;
+ case ZIPO_MPYUHI: printf("%7s", "MPYUHI"); break;
+ case ZIPO_MPYSHI: printf("%7s", "MPYSHI"); break;
+#else // LONG_MPY
+ case ZIPO_LDIHI: fprintf(stderr, "%7s", "LDIHI"); break;
+ case ZIPO_MPYU: fprintf(stderr, "%7s", "MPYU"); break;
+ case ZIPO_MPYS: fprintf(stderr, "%7s", "MPYS"); break;
+ case ZIPO_LDIHI: printf("%7s", "LDIHI"); break;
+ case ZIPO_MPYU: printf("%7s", "MPYU"); break;
+ case ZIPO_MPYS: printf("%7s", "MPYS"); break;
+#endif
+ case ZIPO_LDILO: fprintf(stderr, "%7s", "LDILO"); break;
+ case ZIPO_BREV: fprintf(stderr, "%7s", "BREV"); break;
+ case ZIPO_POPC: fprintf(stderr, "%7s", "POPC"); break;
+ case ZIPO_ROL: fprintf(stderr, "%7s", "ROL"); break;
+ case ZIPO_MOV: fprintf(stderr, "%7s", "MOV"); break;
+ case ZIPO_CMP: fprintf(stderr, "%7s", "CMP"); break;
+ case ZIPO_TST: fprintf(stderr, "%7s", "TST"); break;
+ case ZIPO_LOD: fprintf(stderr, "%7s", "LOD"); break;
+ case ZIPO_STO: fprintf(stderr, "%7s", "STO"); break;
+ case ZIPO_DIVU: fprintf(stderr, "%7s", "DIVU"); break;
+ case ZIPO_DIVS: fprintf(stderr, "%7s", "DIVS"); break;
+ case ZIPO_FPADD: fprintf(stderr, "%7s", "FPADD"); break;
+ case ZIPO_FPSUB: fprintf(stderr, "%7s", "FPSUB"); break;
+ case ZIPO_LDILO: printf("%7s", "LDILO"); break;
+ case ZIPO_BREV: printf("%7s", "BREV"); break;
+ case ZIPO_POPC: printf("%7s", "POPC"); break;
+ case ZIPO_ROL: printf("%7s", "ROL"); break;
+ case ZIPO_MOV: printf("%7s", "MOV"); break;
+ case ZIPO_CMP: printf("%7s", "CMP"); break;
+ case ZIPO_TST: printf("%7s", "TST"); break;
+ case ZIPO_LOD: printf("%7s", "LOD"); break;
+ case ZIPO_STO: printf("%7s", "STO"); break;
+ case ZIPO_DIVU: printf("%7s", "DIVU"); break;
+ case ZIPO_DIVS: printf("%7s", "DIVS"); break;
+ case ZIPO_FPADD: printf("%7s", "FPADD"); break;
+ case ZIPO_FPSUB: printf("%7s", "FPSUB"); break;
+ //
+ case ZIPO_NOOP: fprintf(stderr, "%7s", "NOOP"); break;
+ case ZIPO_BREAK: fprintf(stderr, "%7s", "BREAK"); break;
+ case ZIPO_LOCK: fprintf(stderr, "%7s", "LOCK"); break;
+ case ZIPO_TRAP: fprintf(stderr, "%7s", "TRAP"); break;
+ case ZIPO_CLR: fprintf(stderr, "%7s", "CLR"); break;
+ case ZIPO_CLRF: fprintf(stderr, "%7s", "CLRF"); break;
+ case ZIPO_HALT: fprintf(stderr, "%7s", "HALT"); break;
+ case ZIPO_WAIT: fprintf(stderr, "%7s", "WAIT"); break;
+ case ZIPO_RTU: fprintf(stderr, "%7s", "RTU"); break;
+ case ZIPO_BRA: fprintf(stderr, "%7s", "BRA"); break;
+ case ZIPO_BUSY: fprintf(stderr, "%7s", "BUSY"); break;
+ case ZIPO_JMP: fprintf(stderr, "%7s", "JMP"); break;
+ case ZIPO_NOT: fprintf(stderr, "%7s", "NOT"); break;
+ case ZIPO_NEG: fprintf(stderr, "%7s", "NEG"); break;
+ case ZIPO_NOOP: printf("%7s", "NOOP"); break;
+ case ZIPO_BREAK: printf("%7s", "BREAK"); break;
+ case ZIPO_LOCK: printf("%7s", "LOCK"); break;
+ case ZIPO_TRAP: printf("%7s", "TRAP"); break;
+ case ZIPO_CLR: printf("%7s", "CLR"); break;
+ case ZIPO_CLRF: printf("%7s", "CLRF"); break;
+ case ZIPO_HALT: printf("%7s", "HALT"); break;
+ case ZIPO_WAIT: printf("%7s", "WAIT"); break;
+ case ZIPO_RTU: printf("%7s", "RTU"); break;
+ case ZIPO_BRA: printf("%7s", "BRA"); break;
+ case ZIPO_BUSY: printf("%7s", "BUSY"); break;
+ case ZIPO_JMP: printf("%7s", "JMP"); break;
+ case ZIPO_NOT: printf("%7s", "NOT"); break;
+ case ZIPO_NEG: printf("%7s", "NEG"); break;
+ default:
+ fprintf(stderr, "%d", insn->i_op); break;
+ printf("%d", insn->i_op); break;
+ }
+ switch(insn->i_cnd) {
+ case ZIPC_LT: fprintf(stderr, "%-3s", ".LT"); break;
+ case ZIPC_GE: fprintf(stderr, "%-3s", ".GE"); break;
+ case ZIPC_GT: fprintf(stderr, "%-3s", ".GT"); break;
+ case ZIPC_NZ: fprintf(stderr, "%-3s", ".NE"); break;
+ case ZIPC_Z: fprintf(stderr, "%-3s", ".Z"); break;
+ case ZIPC_V: fprintf(stderr, "%-3s", ".V"); break;
+ case ZIPC_C: fprintf(stderr, "%-3s", ".C"); break;
+ case ZIPC_LT: printf("%-3s", ".LT"); break;
+ case ZIPC_GE: printf("%-3s", ".GE"); break;
+ case ZIPC_GT: printf("%-3s", ".GT"); break;
+ case ZIPC_NZ: printf("%-3s", ".NE"); break;
+ case ZIPC_Z: printf("%-3s", ".Z"); break;
+ case ZIPC_V: printf("%-3s", ".V"); break;
+ case ZIPC_C: printf("%-3s", ".C"); break;
+ case ZIPC_ALWAYS:
+ default:
+ break;
+ } fprintf(stderr, " %d", (int)insn->i_cnd);
+ } printf(" %d", (int)insn->i_cnd);
+
+ fprintf(stderr, "\n\tAREG = %d\n\tB = ", insn->i_areg);
+ printf("\n\tAREG = %d\n\tB = ", insn->i_areg);
+ if (insn->i_rp) {
+ if (insn->i_imm != 0)
+ fprintf(stderr, "$%d + ", insn->i_imm);
+ fprintf(stderr, "%s ", (insn->i_rp->r_sym) ?
+ printf("$%d + ", insn->i_imm);
+ printf("%s ", (insn->i_rp->r_sym) ?
+ S_GET_NAME(insn->i_rp->r_sym) : "(null)");
+ } else
+ fprintf(stderr, "%d[%08x] (no sym)", insn->i_imm, insn->i_imm);
+ printf("%d[%08x] (no sym)", insn->i_imm, insn->i_imm);
+ if (insn->i_breg != ZIP_RNONE)
+ fprintf(stderr, "+ R%d", insn->i_breg);
+ fprintf(stderr, "\n");
+ printf("+ R%d", insn->i_breg);
+ printf("\n");
+ if (insn->i_rp)
+ fprintf(stderr, "\t@%ld\n", insn->i_rp->r_fr_offset);
+ fprintf(stderr, "\tINSN:CODE %08x", insn->i_code);
+ printf("\t@%ld\n", insn->i_rp->r_fr_offset);
+ printf("\tINSN:CODE %08x", insn->i_code);
+ {
+ int i;
+ for(i=0; (i<insn->i_naux)&&(i<ZIP_MAX_NAUX); i++)
+ fprintf(stderr, ":%08x", insn->i_aux[i]);
+ printf(":%08x", insn->i_aux[i]);
+ }
+ fprintf(stderr, "\n\tDUMPED\n");
+ printf("\n\tDUMPED\n");
+}
+#endif
+
3453,15 → 3319,15
+
+ /*
+ if ((*lbl)&&(insn->i_imm == 0))
+ fprintf(stderr, "OPB-RESULT: %s", lbl);
+ printf("OPB-RESULT: %s", lbl);
+ else {
+ fprintf(stderr, "OPB-RESULT: 0x%08x", insn->i_imm);
+ printf("OPB-RESULT: 0x%08x", insn->i_imm);
+ if (*lbl)
+ fprintf(stderr, " + %s", lbl);
+ printf(" + %s", lbl);
+ }
+ if (insn->i_breg != ZIP_RNONE)
+ fprintf(stderr, " + R%d", insn->i_breg);
+ fprintf(stderr, "\n");
+ printf(" + R%d", insn->i_breg);
+ printf("\n");
+ */
+
+ return err;
3486,7 → 3352,7
+ char *cndp = NULL;
+
+#ifdef ZIP_DEBUG
+ fprintf(stderr, "**** Parsing %s\n", line);
+ printf("**** Parsing %s\n", line);
+#endif
+
+ insn->i_naux = 0;
3809,7 → 3675,7
+ }
+
+ /*
+ fprintf(stderr, "LEFT = %s, RIGHT = %s%s\n", (left)?left:"(null)", (right)?right:"(null)",
+ printf("LEFT = %s, RIGHT = %s%s\n", (left)?left:"(null)", (right)?right:"(null)",
+ (insn->i_rp)?", (i_rp != NULL)":"");
+ */
+
4041,8 → 3907,6
+#define DBLREGOP(OP,CND,IMM,B,A) (((OP&0x01f)<<22)|((A&0x0f)<<27) \
+ | ((CND&0x07)<<19)|(1<<18)|((B&0x0f)<<14) \
+ | (IMM & 0x03fff))
+#define SMPLMOV(CND,IMM,B,A) (((ZIPO_MOV&0x01f)<<22)|((A&0x0f)<<27) \
+ | ((CND&0x07)<<19)|((B&0x0f)<<14)|(IMM & 0x01fff))
+#define IMMOP(OP,CND,IMM,A) (((OP&0x01f)<<22)|((A&0x0f)<<27) \
+ | ((CND&0x07)<<19)|(IMM & 0x03ffff))
+
4255,11 → 4119,6
+ // address, therefore we cannot merge the previous instruction with
+ // another one that might follow.
+ vliw_mergable = FALSE;
+ //
+ // Likewise, our shadow virtual machine values may be ... unknown
+ // upon any jump to this location. Hence, we declare them unknown
+ // here.
+ zip_clear_machine(&zipm);
+}
+
+// UNITS:
4270,7 → 4129,7
+//
+static void
+zip_assemble_insn_words(fragS *fragP, segT seg, ZIPIS *insn, int relax_state,
+ long stretch, MACHINEREGS *pzipm)
+ long stretch)
+{
+#ifdef ZIP_DEBUG
+ zip_dump_insn(insn);
4303,7 → 4162,7
+
+#ifdef ZIP_DEBUG
+ { int this_frag = (sym_frag == fragP);
+ fprintf(stderr, "Determined symbol is %sin this frag, and %sin this segment\n", (this_frag)?"":"not ", (this_segment)?"":"not ");
+ printf("Determined symbol is %sin this frag, and %sin this segment\n", (this_frag)?"":"not ", (this_segment)?"":"not ");
+ }
+#endif
+
4365,7 → 4224,7
+ }
+#ifdef ZIP_DEBUG
+ if (sym_known)
+ fprintf(stderr, "%08lx@%08lx/%08lx - SYM(%s)-KNOWN %s%s%s%s%s\n",
+ printf("%08lx@%08lx/%08lx - SYM(%s)-KNOWN %s%s%s%s%s\n",
+ (unsigned long)fragP->fr_literal,
+ fragP->fr_address/OCTETS_PER_BYTE,
+ (unsigned long)symv, S_GET_NAME(sym),
4375,7 → 4234,7
+ ((this_segment)&&(fragP->fr_address != 0))?" this-seg ":"",
+ insn->i_rp->r_pcrel?" (PC-REL)":" (ABS)");
+ else if (insn->i_rp)
+ fprintf(stderr, "%08lx@%08lx/%08lx - SYM(%s) -- not known (yet) %s%s%s%s%s%s\n",
+ printf("%08lx@%08lx/%08lx - SYM(%s) -- not known (yet) %s%s%s%s%s%s\n",
+ (unsigned long)fragP->fr_literal, fragP->fr_address/OCTETS_PER_BYTE,
+ (unsigned long)symv, S_GET_NAME(sym),
+ (!sym_defined)?"-- not defined":"",
4386,7 → 4245,7
+ ((this_segment)&&(fragP->fr_address != 0))?" this-off ":""
+ );
+
+ fprintf(stderr, "SYM-DEF %d,%d,%d,%d, IMM = %08x\n",
+ printf("SYM-DEF %d,%d,%d,%d, IMM = %08x\n",
+ sym_defined, sym_known,
+ (insn->i_rp)&&(symbol_get_frag(insn->i_rp->r_sym)==fragP)?1:0,
+ this_segment, insn->i_imm);
4400,7 → 4259,7
+ insn->i_op = ZIPO_MOV;
+ insn->i_naux = 0;
+ zip_assemble_insn_words(fragP, seg, insn, relax_state,
+ stretch, pzipm);
+ stretch);
+ // Tested--this works
+ return;
+ }
4418,7 → 4277,8
+ |(immv & 0x07fffff);
+ if (insn->i_rp)
+ insn->i_rp->r_type = BFD_RELOC_NONE;
+ } else if (((!insn->i_rp)||(sym_known)) &&(fits_within(18, zip_brev(immv)))) {
+ } else if (((!insn->i_rp)||(sym_known))
+ &&(fits_within(18, zip_brev(immv)))) {
+ // Can we do this with a BREV instruction using an
+ // immediate? If so, we can then conditionally load
+ // the top 18 bist of any value ...
4429,73 → 4289,31
+ insn->i_areg&0x0f);
+ if (insn->i_rp)
+ insn->i_rp->r_type = BFD_RELOC_NONE;
+
+ } else if ((pzipm)&&((!insn->i_rp)||(sym_known))
+ &&(pzipm->r[insn->i_areg].m_known)
+ &&(0==((immv^pzipm->r[insn->i_areg].m_value)
+ & 0x0ffff0000))) {
+fprintf(stderr, "Creating an LDILO\n");
+ // Replace LDI with LDILO
+ insn->i_naux = 0;
+ insn->i_code=IMMOP(ZIPO_LDILO, insn->i_cnd,
+ (immv&0x0ffff), insn->i_areg);
+
+ pzipm->r[insn->i_areg].m_value = immv;
+ if (ZIPC_ALWAYS == insn->i_cnd) {
+ // Henceforth, we only know the bottom 16bits
+ // of this register
+ pzipm->r[insn->i_areg].m_known = 2;
+ } else
+ pzipm->r[insn->i_areg].m_known = 1;
+ } else {
+ //
+ // If the symbol isn't defined, then any immv value
+ // will work--we have to come back anyway.
+ //
+ int known_bypass = 0, i;
+
+ if ((pzipm)&&((!insn->i_rp)||(sym_known))) {
+ for(i=0; i<14; i++) {
+ int offset = immv-pzipm->r[i].m_value;
+ if ((pzipm->r[i].m_known==1)
+ &&(fits_within(13, offset))) {
+ // Pick the closest value ... if
+ // there's a choice
+ if ((!known_bypass)
+ ||(abs(offset)<known_bypass))
+ continue;
+ insn->i_naux = 0;
+ insn->i_op = ZIPO_MOV;
+ insn->i_breg = i;
+ insn->i_imm = offset;
+
+ insn->i_code = SMPLMOV(
+ insn->i_cnd, offset,
+ i, insn->i_areg);
+ known_bypass = abs(offset);
+ if (known_bypass==0)
+ known_bypass = 1;
+ }
+ } known_bypass = (known_bypass)?1:0;
+ } if (!known_bypass) {
+ // BREV Extension would modify this statement
+ insn->i_naux = 1;
+ insn->i_code = IMMOP(ZIPO_BREV, insn->i_cnd,
+ zip_brev(immv)&0x01ffff, insn->i_areg);
+ insn->i_aux[0]=IMMOP(ZIPO_LDILO, insn->i_cnd,
+ // BREV Extension would modify this statement
+ insn->i_naux = 1;
+ insn->i_code = IMMOP(ZIPO_BREV, insn->i_cnd,
+ zip_brev(immv)&0x01ffff, insn->i_areg);
+ // insn->i_code = IMMOP(ZIPO_LDIHI, insn->i_cnd,
+ // immv&0x0ffff,
+ // insn->i_areg);
+ insn->i_aux[0]=IMMOP(ZIPO_LDILO, insn->i_cnd,
+ (immv&0x0ffff), insn->i_areg);
+ if (insn->i_rp)
+ insn->i_rp->r_type = BFD_RELOC_ZIP_LDI;
+ else if ((zip_param_vliw)&&(zip_can_merge(insn->i_code, insn->i_aux[0]))) {
+ insn->i_code = zip_insn_merge(insn->i_code, insn->i_aux[0]);
+ insn->i_naux = 0;
+ }
+ } else {
+fprintf(stderr, "known-bypass\n");
+ if (insn->i_rp)
+ insn->i_rp->r_type = BFD_RELOC_ZIP_LDI;
+ else if ((zip_param_vliw)&&(zip_can_merge(insn->i_code, insn->i_aux[0]))) {
+ insn->i_code = zip_insn_merge(insn->i_code, insn->i_aux[0]);
+ insn->i_naux = 0;
+
+ }
+ }
+#ifdef ZIP_DEBUG
+ fprintf(stderr, "LDI %04x:%04x,%d Instruction assembled into %08x : %08x\n",
+ printf("LDI %04x:%04x,%d Instruction assembled into %08x : %08x\n",
+ (immv>>16)&0x0ffff,
+ immv & 0x0ffff, insn->i_areg,
+ insn->i_code, insn->i_aux[0]);
4503,7 → 4321,7
+ break;
+ case ZIPO_BRA: // Includes both conditional and unconditional branches
+#ifdef ZIP_DEBUG
+ fprintf(stderr, "ZIPO--BRA (ADDR = %08lx, OFFSET = %08lx)\n",
+ printf("ZIPO--BRA (ADDR = %08lx, OFFSET = %08lx)\n",
+ fragP->fr_address,
+ (insn->i_rp)?insn->i_rp->r_fr_offset:0);
+#endif
4514,7 → 4332,7
+
+#ifdef ZIP_DEBUG
+ if (!fits_within(18,immv))
+ fprintf(stderr, "doesn't fit in 18 bits\n");
+ printf("doesn't fit in 18 bits\n");
+#endif
+ if ((!sym_known)||(!fits_within(18,immv))) {
+ //
4524,7 → 4342,7
+ // be branching (or jumping) to a location defined by a
+ // symbol.
+#ifdef ZIP_DEBUG
+ fprintf(stderr, "BRA IMM = %08x = %d\n", immv, immv);
+ printf("BRA IMM = %08x = %d\n", immv, immv);
+#endif
+ if (insn->i_cnd == ZIPC_ALWAYS) {
+ insn->i_naux = 1;
4568,7 → 4386,7
+ // Tested--this works
+ }
+#ifdef ZIP_DEBUG
+ fprintf(stderr, "BRA %08lx->%08x(%d,%d) assembled into(%d) %08x : %08x : %08x\n",
+ printf("BRA %08lx->%08x(%d,%d) assembled into(%d) %08x : %08x : %08x\n",
+ symv, immv, sym_defined, relax_state,
+ insn->i_naux, insn->i_code,
+ insn->i_aux[0], insn->i_aux[1]);
4608,12 → 4426,10
+ insn->i_rp->r_type = BFD_RELOC_NONE;
+ } else {
+#ifdef ZIP_DEBUG
+ fprintf(stderr, "ZIP_MOV_PCREL relocation needed for %s, pcrel = %d\n", S_GET_NAME(sym), insn->i_rp->r_pcrel);
+ printf("ZIP_MOV_PCREL relocation needed for %s, pcrel = %d\n", S_GET_NAME(sym), insn->i_rp->r_pcrel);
+#endif
+ insn->i_rp->r_type = BFD_RELOC_ZIP_MOV_PCREL;
+ }
+
+
+// } else if((zip_param_got)&&(insn->i_breg == ZIP_GBL)) {
+// immv = symv;
+// insn->i_rp->r_type = BFD_RELOC_ZIP_MOV_GOTREL;
4643,8 → 4459,13
+ return;
+ }
+ */
+ insn->i_code = SMPLMOV(insn->i_cnd, immv, insn->i_breg,
+ insn->i_areg);
+ insn->i_code = (0<<31)
+ |((insn->i_areg&0x0f)<<27)
+ |((insn->i_op &0x1f)<<(31-4-5))
+ |((insn->i_cnd &0x07)<<(31-4-5-3));
+ insn->i_code |=
+ ((insn->i_breg&0x0f)<<(31-17))
+ |(immv&0x01fff);
+ //
+ // Now for the extra two register bits only present in move
+ // instructions
4652,7 → 4473,7
+ insn->i_code |= (insn->i_areg&0x10)?0x40000:0;
+ insn->i_code |= (insn->i_breg&0x10)?0x02000:0;
+#ifdef ZIP_DEBUG
+ fprintf(stderr, "MOV Instruction assembled into %08x\n", insn->i_code);
+ printf("MOV Instruction assembled into %08x\n", insn->i_code);
+#endif
+ break;
+ case ZIPO_NEG:
4717,7 → 4538,7
+ insn->i_rp->r_type = BFD_RELOC_ZIP_OPB_IMM;
+ }
+#ifdef ZIP_DEBUG
+ fprintf(stderr, "Instruction assembled into %08x%s\n", insn->i_code,
+ printf("Instruction assembled into %08x%s\n", insn->i_code,
+ (insn->i_rp)?" w/ Symbol":"");
+#endif
+ break;
4738,7 → 4559,7
+ char *p;
+
+#ifdef ZIP_DEBUG
+ fprintf(stderr, "ZIP-ASSEMBLE %s\n", line);
+ printf("ZIP-ASSEMBLE %s\n", line);
+#endif
+
+ if (error) {
4746,8 → 4567,7
+ return;
+ }
+
+ zip_assemble_insn_words(frag_now, now_seg, insn, 0, 0, &zipm);
+ zip_advance_machine(&zipm, insn);
+ zip_assemble_insn_words(frag_now, now_seg, insn, 0, 0);
+
+ // Then, if the instruction is valid we ...
+ // for branches ...
4904,7 → 4724,7
+ (*val) &= 0x0ffffffff;
+
+#ifdef ZIP_DEBUG
+ fprintf(stderr, "MD-APPLY-FIX: FRAG=%08x@%08x+%08x(%d), IWORD = %08x Val=%08x (RTYP=%d->%s)%s%s, ADDEND=%08lx\n",
+ printf("MD-APPLY-FIX: FRAG=%08x@%08x+%08x(%d), IWORD = %08x Val=%08x (RTYP=%d->%s)%s%s, ADDEND=%08lx\n",
+ ((unsigned)((unsigned long)fixP->fx_frag->fr_literal)),
+ ((unsigned)((unsigned long)fixP->fx_frag->fr_address)),
+ ((unsigned)((unsigned long)fixP->fx_where)),
4917,6 → 4737,7
+#endif
+ switch(fixP->fx_r_type) {
+ case BFD_RELOC_NONE:
+ printf("\tNO-RELOC --- DONE\n");
+ fixP->fx_done = final_fix;
+ break;
+ case BFD_RELOC_ZIP_OPB_IMM:
4946,12 → 4767,12
+ case BFD_RELOC_ZIP_MOV_GOTREL:
+#ifdef ZIP_DEBUG
+ if (fixP->fx_r_type == BFD_RELOC_ZIP_MOV_OFFSET)
+ fprintf(stderr, "\tMD-APPLY-FIX: BFD_RELOC_ZIP_MOV_OFFSET\n");
+ printf("\tMD-APPLY-FIX: BFD_RELOC_ZIP_MOV_OFFSET\n");
+ else if (fixP->fx_r_type == BFD_RELOC_ZIP_MOV_PCREL)
+ fprintf(stderr, "\tMD-APPLY-FIX: BFD_RELOC_ZIP_MOV_PCREL\n");
+ printf("\tMD-APPLY-FIX: BFD_RELOC_ZIP_MOV_PCREL\n");
+ else
+ fprintf(stderr, "\tMD-APPLY-FIX: BFD_RELOC_ZIP_MOV_GOTREL\n");
+ fprintf(stderr, "Final-fix = %d\n", final_fix);
+ printf("\tMD-APPLY-FIX: BFD_RELOC_ZIP_MOV_GOTREL\n");
+ printf("Final-fix = %d\n", final_fix);
+#endif
+ mask = 0x1fff; iword = (iword &(~mask))|((*val)&mask);
+ (*val) &= 0x01fff;
5008,7 → 4829,7
+ fixP->fx_done = final_fix;
+ break;
+ default:
+ fprintf(stderr, "RELOC #\%d not supported\n", fixP->fx_r_type);
+ printf("RELOC #\%d not supported\n", fixP->fx_r_type);
+ // abort();
+ break;
+ }
5019,7 → 4840,7
+tc_gen_reloc(asection *section ATTRIBUTE_UNUSED, fixS *fixP)
+{
+#ifdef ZIP_DEBUG
+ fprintf(stderr, "Call to TC-GEN-RELOC(%s,FIX,%s,+%ld);\n", segment_name(section),
+ printf("Call to TC-GEN-RELOC(%s,FIX,%s,+%ld);\n", segment_name(section),
+ S_GET_NAME(fixP->fx_addsy),fixP->fx_offset);
+#endif
+
5035,7 → 4856,7
+ // instructions giving offsets to symbols, such as LDI .x+50,R0.
+ relP->addend = fixP->fx_offset;
+#ifdef ZIP_DEBUG
+ fprintf(stderr, "ADDEND = %08lx\n", relP->addend);
+ printf("ADDEND = %08lx\n", relP->addend);
+#endif
+ relP->howto = bfd_reloc_type_lookup(stdoutput, fixP->fx_r_type);
+ if (! relP->howto) {
5055,13 → 4876,13
+ ZIPIS *insn = (ZIPIS *)(fragP->fr_opcode);
+ offsetT last_fix = fragP->fr_fix;
+
+ zip_assemble_insn_words(fragP, seg, insn, 1, 0, NULL);
+ zip_assemble_insn_words(fragP, seg, insn, 1, 0);
+
+ // Goal is to estimate the total size of the fragment before any
+ // relaxations. We need to return the difference between that
+ // new estimate of total size and the current value of fragP->fr_fix.
+#ifdef ZIP_DEBUG
+ fprintf(stderr, "(%s): SZ-ESTIMATE %3ld + %d*(1+%d) - %3ld = %3ld\n",
+ printf("(%s): SZ-ESTIMATE %3ld + %d*(1+%d) - %3ld = %3ld\n",
+ S_GET_NAME(insn->i_rp->r_sym),
+ insn->i_rp->r_fr_offset, OCTETS_PER_BYTE, insn->i_naux,
+ fragP->fr_fix,
5100,7 → 4921,7
+
+ // We need to rebuild the instruction since we could relax it
+ // multiple times
+ zip_assemble_insn_words(fragP, seg, insn, 1, stretch, NULL);
+ zip_assemble_insn_words(fragP, seg, insn, 1, stretch);
+ {
+ fragS *lclfP;
+ for(lclfP = fragP; lclfP; lclfP = lclfP->fr_next)
5127,7 → 4948,7
+ // The change in size of this fragment
+ growth = (insn->i_naux - old_naux) * OCTETS_PER_BYTE;
+#ifdef ZIP_DEBUG
+ fprintf(stderr, "GROWING BY %3ld bytes (insn->i_naux = %d->%d, fr_fix was %ld)\n",
+ printf("GROWING BY %3ld bytes (insn->i_naux = %d->%d, fr_fix was %ld)\n",
+ growth, old_naux, insn->i_naux, fragP->fr_fix);
+ gas_assert(fragP->fr_fix >= 0);
+ gas_assert(fragP->fr_fix + growth>= 0);
5149,7 → 4970,7
+ // char *p = fragP->fr_literal+ insn->i_rp->r_fr_offset*OCTETS_PER_BYTE;
+
+#ifdef ZIP_DEBUG
+ fprintf(stderr, "CVT-FRAG: ADDR = %08lx, FIX = %3ld, VAR = %3ld\n",
+ printf("CVT-FRAG: ADDR = %08lx, FIX = %3ld, VAR = %3ld\n",
+ fragP->fr_address, fragP->fr_fix, fragP->fr_var);
+
+ zip_dump_insn(insn);
5186,7 → 5007,7
+ }
+ } else if ((insn->i_op == ZIPO_BRA)&&(insn->i_naux >= 1)) {
+#ifdef ZIP_DEBUG
+ fprintf(stderr, "--- CVT-FRAG --- Creating a BRA fixup\n");
+ printf("--- CVT-FRAG --- Creating a BRA fixup\n");
+#endif
+ fix_new(fragP,
+ OCTETS_PER_BYTE * (insn->i_rp->r_fr_offset +insn->i_naux),
5197,7 → 5018,7
+ BFD_RELOC_ZIP_VALUE); // Reloc type
+ } else {
+#ifdef ZIP_DEBUG
+ fprintf(stderr, "--- CVT-FRAG --- Creating a more generic fixup (%d)\n",
+ printf("--- CVT-FRAG --- Creating a more generic fixup (%d)\n",
+ insn->i_rp->r_type);
+#endif
+ fix_new(fragP,
5212,8 → 5033,8
+}
diff -Naur '--exclude=*.swp' binutils-2.25-original/gas/config/tc-zip.h binutils-2.25/gas/config/tc-zip.h
--- binutils-2.25-original/gas/config/tc-zip.h 1969-12-31 19:00:00.000000000 -0500
+++ binutils-2.25/gas/config/tc-zip.h 2016-09-15 08:40:22.608881028 -0400
@@ -0,0 +1,213 @@
+++ binutils-2.25/gas/config/tc-zip.h 2016-04-19 10:26:34.818991485 -0400
@@ -0,0 +1,211 @@
+////////////////////////////////////////////////////////////////////////////////
+//
+// Filename: tc-zip.h
5390,8 → 5211,6
+ ZIP_RNONE=48
+} ZIP_REG;
+
+#define ZIP_USER_REGS 16
+
+typedef enum {
+ ZIPC_ALWAYS, ZIPC_LT, ZIPC_Z, ZIPC_NZ,
+ ZIPC_GT, ZIPC_GE, ZIPC_C, ZIPC_V
7271,8 → 7090,8
+#endif
diff -Naur '--exclude=*.swp' binutils-2.25-original/opcodes/zip-opc.c binutils-2.25/opcodes/zip-opc.c
--- binutils-2.25-original/opcodes/zip-opc.c 1969-12-31 19:00:00.000000000 -0500
+++ binutils-2.25/opcodes/zip-opc.c 2016-09-15 17:00:44.579304411 -0400
@@ -0,0 +1,559 @@
+++ binutils-2.25/opcodes/zip-opc.c 2016-07-15 11:47:17.674912592 -0400
@@ -0,0 +1,563 @@
+////////////////////////////////////////////////////////////////////////////////
+//
+// Filename: zip-opc.c
7346,6 → 7165,7
+ { "BGE", 0xfffc0000, 0x78a80000, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_IMMFIELD(18,0), ZIP_OPUNUSED },
+ { "BC", 0xfffc0000, 0x78b00000, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_IMMFIELD(18,0), ZIP_OPUNUSED },
+ { "BRV", 0xfffc0000, 0x78b80000, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_IMMFIELD(18,0), ZIP_OPUNUSED },
+ { "BRV", 0xfffc0000, 0x78b80000, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_IMMFIELD(18,0), ZIP_OPUNUSED },
+ // CLRF ... an XOR w/ self instruction
+ // 0.rrrr.00100.ccc.1.rrrr.iiiii---
+ // 0rrr r001 00cc c1rr rr00 0000 0000 0000
7444,6 → 7264,7
+ { "MPYSHI", 0x87c40000, 0x02c00000, ZIP_REGFIELD(27), ZIP_REGFIELD(27), ZIP_OPUNUSED, ZIP_IMMFIELD(18,0), ZIP_BITFIELD(3,19) },
+ { "MPYSHI", 0x87c40000, 0x02c40000, ZIP_REGFIELD(27), ZIP_REGFIELD(27), ZIP_REGFIELD(14), ZIP_IMMFIELD(14,0), ZIP_BITFIELD(3,19) },
+#else
+ //
+ { "MPYU", 0x87c40000, 0x02800000, ZIP_REGFIELD(27), ZIP_REGFIELD(27), ZIP_OPUNUSED, ZIP_IMMFIELD(18,0), ZIP_BITFIELD(3,19) },
+ { "MPYU", 0x87c40000, 0x02840000, ZIP_REGFIELD(27), ZIP_REGFIELD(27), ZIP_REGFIELD(14), ZIP_IMMFIELD(14,0), ZIP_BITFIELD(3,19) },
+ //
7572,7 → 7393,7
+ { "MPYS", 0x87c40000, 0x82c00000, ZIP_REGFIELD(27), ZIP_REGFIELD(27), ZIP_OPUNUSED, ZIP_IMMFIELD(4,14), ZIP_BITFIELD(2,19) },
+ { "MPYS", 0x87c40000, 0x82c40000, ZIP_REGFIELD(27), ZIP_REGFIELD(27), ZIP_REGFIELD(14), ZIP_OPUNUSED, ZIP_BITFIELD(2,19) },
+#endif
+ // brev
+ //
+ { "BREV", 0x87c40000, 0x83000000, ZIP_REGFIELD(27), ZIP_REGFIELD(27), ZIP_OPUNUSED, ZIP_IMMFIELD(4,14), ZIP_BITFIELD(2,19) },
+ { "BREV", 0x87c40000, 0x83040000, ZIP_REGFIELD(27), ZIP_REGFIELD(27), ZIP_REGFIELD(14), ZIP_OPUNUSED, ZIP_BITFIELD(2,19) },
+ //
7715,11 → 7536,12
+ { "LDIHI",0x800003e0, 0x80000100, ZIP_REGFIELD(10), ZIP_REGFIELD(10), ZIP_OPUNUSED, ZIP_IMMFIELD(5,0), ZIP_BITFIELD(2,19) },
+ { "LDIHI",0x802003e0, 0x80200100, ZIP_REGFIELD(10), ZIP_REGFIELD(10), ZIP_OPUNUSED, ZIP_IMMFIELD(5,0), ZIP_OPUNUSED },
+#endif
+ // ldilo
+ //
+ { "LDILO",0x800003e0, 0x80000120, ZIP_REGFIELD(10), ZIP_REGFIELD(10), ZIP_OPUNUSED, ZIP_IMMFIELD(5,0), ZIP_BITFIELD(2,19) },
+ { "LDILO",0x802003e0, 0x80200120, ZIP_REGFIELD(10), ZIP_REGFIELD(10), ZIP_OPUNUSED, ZIP_IMMFIELD(5,0), ZIP_OPUNUSED },
+ //
+#ifdef LONG_MPY
+ //
+ { "MPYUHI", 0x800003f0, 0x80000140, ZIP_REGFIELD(10), ZIP_REGFIELD(10), ZIP_OPUNUSED, ZIP_IMMFIELD(4,0), ZIP_BITFIELD(2,19) },
+ { "MPYUHI", 0x802003f0, 0x80200140, ZIP_REGFIELD(10), ZIP_REGFIELD(10), ZIP_OPUNUSED, ZIP_IMMFIELD(4,0), ZIP_OPUNUSED },
+ { "MPYUHI", 0x800003f0, 0x80000150, ZIP_REGFIELD(10), ZIP_REGFIELD(10), ZIP_REGFIELD(0), ZIP_OPUNUSED, ZIP_BITFIELD(2,19) },
7731,16 → 7553,17
+ { "MPYSHI", 0x802003f0, 0x80200170, ZIP_REGFIELD(10), ZIP_REGFIELD(10), ZIP_REGFIELD(0), ZIP_OPUNUSED, ZIP_OPUNUSED },
+ //
+#else
+ //
+ { "MPYU", 0x800003f0, 0x80000140, ZIP_REGFIELD(10), ZIP_REGFIELD(10), ZIP_OPUNUSED, ZIP_IMMFIELD(4,0), ZIP_BITFIELD(2,19) },
+ { "MPYU", 0x802003f0, 0x80200140, ZIP_REGFIELD(10), ZIP_REGFIELD(10), ZIP_OPUNUSED, ZIP_IMMFIELD(4,0), ZIP_OPUNUSED },
+ { "MPYU", 0x800003f0, 0x80000150, ZIP_REGFIELD(10), ZIP_REGFIELD(10), ZIP_REGFIELD(0), ZIP_OPUNUSED, ZIP_BITFIELD(2,19) },
+ { "MPYU", 0x802003f0, 0x80200150, ZIP_REGFIELD(10), ZIP_REGFIELD(10), ZIP_REGFIELD(0), ZIP_OPUNUSED, ZIP_OPUNUSED },
+ // ad
+ //
+ { "MPYS", 0x800003f0, 0x80000160, ZIP_REGFIELD(10), ZIP_REGFIELD(10), ZIP_OPUNUSED, ZIP_IMMFIELD(4,0), ZIP_BITFIELD(2,19) },
+ { "MPYS", 0x802003f0, 0x80200160, ZIP_REGFIELD(10), ZIP_REGFIELD(10), ZIP_OPUNUSED, ZIP_IMMFIELD(4,0), ZIP_OPUNUSED },
+ { "MPYS", 0x800003f0, 0x80000170, ZIP_REGFIELD(10), ZIP_REGFIELD(10), ZIP_REGFIELD(0), ZIP_OPUNUSED, ZIP_BITFIELD(2,19) },
+ { "MPYS", 0x802003f0, 0x80200170, ZIP_REGFIELD(10), ZIP_REGFIELD(10), ZIP_REGFIELD(0), ZIP_OPUNUSED, ZIP_OPUNUSED },
+ // mpe
+ //
+#endif
+ //
+ { "BREV", 0x800003f0, 0x80000180, ZIP_REGFIELD(10), ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_IMMFIELD(4,0), ZIP_BITFIELD(2,19) },
7747,20 → 7570,20
+ { "BREV", 0x802003f0, 0x80200180, ZIP_REGFIELD(10), ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_IMMFIELD(4,0), ZIP_OPUNUSED },
+ { "BREV", 0x800003f0, 0x80000190, ZIP_REGFIELD(10), ZIP_OPUNUSED, ZIP_REGFIELD(0), ZIP_OPUNUSED, ZIP_BITFIELD(2,19) },
+ { "BREV", 0x802003f0, 0x80200190, ZIP_REGFIELD(10), ZIP_OPUNUSED, ZIP_REGFIELD(0), ZIP_OPUNUSED, ZIP_OPUNUSED },
+ // popc
+ //
+ { "POPC", 0x800003f0, 0x800001a0, ZIP_REGFIELD(10), ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_IMMFIELD(4,0), ZIP_BITFIELD(2,19) },
+ { "POPC", 0x802003f0, 0x802001a0, ZIP_REGFIELD(10), ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_IMMFIELD(4,0), ZIP_OPUNUSED },
+ { "POPC", 0x800003f0, 0x800001b0, ZIP_REGFIELD(10), ZIP_OPUNUSED, ZIP_REGFIELD(0), ZIP_OPUNUSED, ZIP_BITFIELD(2,19) },
+ { "POPC", 0x802003f0, 0x802001b0, ZIP_REGFIELD(10), ZIP_OPUNUSED, ZIP_REGFIELD(0), ZIP_OPUNUSED, ZIP_OPUNUSED },
+ // rol
+ //
+ { "ROL", 0x800003f0, 0x800001c0, ZIP_REGFIELD(10), ZIP_REGFIELD(10), ZIP_OPUNUSED, ZIP_IMMFIELD(4,0), ZIP_BITFIELD(2,19) },
+ { "ROL", 0x802003f0, 0x802001c0, ZIP_REGFIELD(10), ZIP_REGFIELD(10), ZIP_OPUNUSED, ZIP_IMMFIELD(4,0), ZIP_OPUNUSED },
+ { "ROL", 0x800003f0, 0x800001d0, ZIP_REGFIELD(10), ZIP_REGFIELD(10), ZIP_REGFIELD(0), ZIP_OPUNUSED, ZIP_BITFIELD(2,19) },
+ { "ROL", 0x802003f0, 0x802001d0, ZIP_REGFIELD(10), ZIP_REGFIELD(10), ZIP_REGFIELD(0), ZIP_OPUNUSED, ZIP_OPUNUSED },
+ // mov
+ //
+ { "MOV", 0x800003f0, 0x800001f0, ZIP_REGFIELD(10), ZIP_REGFIELD(10), ZIP_REGFIELD(0), ZIP_OPUNUSED, ZIP_BITFIELD(2,19) },
+ { "MOV", 0x802003f0, 0x802001f0, ZIP_REGFIELD(10), ZIP_REGFIELD(10), ZIP_REGFIELD(0), ZIP_OPUNUSED, ZIP_OPUNUSED },
+ // cmp
+ //
+ { "CMP", 0x800003f0, 0x80000200, ZIP_REGFIELD(10), ZIP_REGFIELD(10), ZIP_OPUNUSED, ZIP_IMMFIELD(4,0), ZIP_BITFIELD(2,19) },
+ { "CMP", 0x802003f0, 0x80200200, ZIP_REGFIELD(10), ZIP_REGFIELD(10), ZIP_OPUNUSED, ZIP_IMMFIELD(4,0), ZIP_OPUNUSED },
+ { "CMP", 0x800003f0, 0x80000210, ZIP_REGFIELD(10), ZIP_REGFIELD(10), ZIP_REGFIELD(0), ZIP_OPUNUSED, ZIP_BITFIELD(2,19) },
7770,13 → 7593,13
+ { "TST", 0x802003f0, 0x80200220, ZIP_REGFIELD(10), ZIP_REGFIELD(10), ZIP_OPUNUSED, ZIP_IMMFIELD(4,0), ZIP_OPUNUSED },
+ { "TST", 0x800003f0, 0x80000230, ZIP_REGFIELD(10), ZIP_REGFIELD(10), ZIP_REGFIELD(0), ZIP_OPUNUSED, ZIP_BITFIELD(2,19) },
+ { "TST", 0x802003f0, 0x80200230, ZIP_REGFIELD(10), ZIP_REGFIELD(10), ZIP_REGFIELD(0), ZIP_OPUNUSED, ZIP_OPUNUSED },
+ // Loads
+ //
+ { "LOD", 0x800003f0, 0x80000250, ZIP_REGFIELD(10), ZIP_OPUNUSED, ZIP_REGFIELD(0), ZIP_OPUNUSED, ZIP_BITFIELD(2,19) },
+ { "LOD", 0x802003f0, 0x80200250, ZIP_REGFIELD(10), ZIP_OPUNUSED, ZIP_REGFIELD(0), ZIP_OPUNUSED, ZIP_OPUNUSED },
+ // Stores
+ //
+ { "STO", 0x800003f0, 0x80000270, ZIP_OPUNUSED, ZIP_REGFIELD(10), ZIP_REGFIELD(0), ZIP_OPUNUSED, ZIP_BITFIELD(2,19) },
+ { "STO", 0x802003f0, 0x80200270, ZIP_OPUNUSED, ZIP_REGFIELD(10), ZIP_REGFIELD(0), ZIP_OPUNUSED, ZIP_OPUNUSED },
+ // Divide based instructions
+ //
+ { "DIVU", 0x800003f0, 0x80000280, ZIP_REGFIELD(10), ZIP_REGFIELD(10), ZIP_OPUNUSED, ZIP_IMMFIELD(4,0), ZIP_BITFIELD(2,19) },
+ { "DIVU", 0x802003f0, 0x80200280, ZIP_REGFIELD(10), ZIP_REGFIELD(10), ZIP_OPUNUSED, ZIP_IMMFIELD(4,0), ZIP_OPUNUSED },
+ { "DIVU", 0x800003f0, 0x80000290, ZIP_REGFIELD(10), ZIP_REGFIELD(10), ZIP_REGFIELD(0), ZIP_OPUNUSED, ZIP_BITFIELD(2,19) },
7786,7 → 7609,7
+ { "DIVS", 0x802003f0, 0x802002a0, ZIP_REGFIELD(10), ZIP_REGFIELD(10), ZIP_OPUNUSED, ZIP_IMMFIELD(4,0), ZIP_OPUNUSED },
+ { "DIVS", 0x800003f0, 0x800002b0, ZIP_REGFIELD(10), ZIP_REGFIELD(10), ZIP_REGFIELD(0), ZIP_OPUNUSED, ZIP_BITFIELD(2,19) },
+ { "DIVS", 0x802003f0, 0x802002b0, ZIP_REGFIELD(10), ZIP_REGFIELD(10), ZIP_REGFIELD(0), ZIP_OPUNUSED, ZIP_OPUNUSED },
+ // LDI based instructions
+ //
+ { "CLR", 0x802003df, 0x800002c0, ZIP_REGFIELD(10), ZIP_REGFIELD(10), ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_OPUNUSED },
+ { "CLR", 0x802003df, 0x802002c0, ZIP_REGFIELD(10), ZIP_REGFIELD(10), ZIP_OPUNUSED, ZIP_OPUNUSED, ZIP_BITFIELD(2,19) },
+ { "LDI", 0x802003c0, 0x800002c0, ZIP_REGFIELD(10), ZIP_REGFIELD(10), ZIP_OPUNUSED, ZIP_IMMFIELD(5,0), ZIP_OPUNUSED },
/zipcpu/trunk/sw/zipdbg/zipdbg.cpp
46,129 → 46,25
#include <signal.h>
#include <time.h>
#include <unistd.h>
#include <string.h>
 
#include <ctype.h>
#include <ncurses.h>
 
// #include "twoc.h"
// #include "qspiflashsim.h"
#include "zopcodes.h"
#include "zparser.h"
#include "devbus.h"
#include "regdefs.h"
// #include "port.h"
 
#define KEY_ESCAPE 27
#define KEY_RETURN 10
#define CTRL(X) ((X)&0x01f)
 
class SPARSEMEM {
public:
bool m_valid;
unsigned int m_a, m_d;
};
 
bool gbl_err = false;
class ZIPSTATE {
public:
bool m_valid, m_gie, m_last_pc_valid;
unsigned int m_sR[16], m_uR[16];
unsigned int m_p[20];
unsigned int m_last_pc, m_pc, m_sp;
SPARSEMEM m_smem[5];
SPARSEMEM m_imem[5];
ZIPSTATE(void) : m_valid(false), m_last_pc_valid(false) {}
 
void step(void) {
m_last_pc_valid = true;
m_last_pc = m_pc;
}
};
 
// No particular "parameters" need definition or redefinition here.
class ZIPPY : public DEVBUS {
static const int MAXERR;
typedef DEVBUS::BUSW BUSW;
DEVBUS *m_fpga;
int m_cursor;
ZIPSTATE m_state;
bool m_user_break, m_show_users_timers, m_show_cc;
public:
ZIPPY(DEVBUS *fpga) : m_fpga(fpga), m_cursor(0), m_user_break(false),
m_show_users_timers(false), m_show_cc(false) {}
ZIPPY(DEVBUS *fpga) : m_fpga(fpga) {}
 
void read_raw_state(void) {
m_state.m_valid = false;
for(int i=0; i<16; i++)
m_state.m_sR[i] = cmd_read(i);
for(int i=0; i<16; i++)
m_state.m_uR[i] = cmd_read(i+16);
for(int i=0; i<20; i++)
m_state.m_p[i] = cmd_read(i+32);
 
m_state.m_gie = (m_state.m_sR[14] & 0x020);
m_state.m_pc = (m_state.m_gie) ? (m_state.m_uR[15]):(m_state.m_sR[15]);
m_state.m_sp = (m_state.m_gie) ? (m_state.m_uR[13]):(m_state.m_sR[13]);
 
if (m_state.m_last_pc_valid)
m_state.m_imem[0].m_a = m_state.m_last_pc;
else
m_state.m_imem[0].m_a = m_state.m_pc - 1;
try {
m_state.m_imem[0].m_d = readio(m_state.m_imem[0].m_a);
m_state.m_imem[0].m_valid = true;
} catch(BUSERR be) {
m_state.m_imem[0].m_valid = false;
}
m_state.m_imem[1].m_a = m_state.m_pc;
try {
m_state.m_imem[1].m_d = readio(m_state.m_imem[1].m_a);
m_state.m_imem[1].m_valid = true;
} catch(BUSERR be) {
m_state.m_imem[1].m_valid = false;
}
 
for(int i=1; i<4; i++) {
if (!m_state.m_imem[i].m_valid) {
m_state.m_imem[i+1].m_valid = false;
m_state.m_imem[i+1].m_a = m_state.m_imem[i].m_a+1;
continue;
}
m_state.m_imem[i+1].m_a = zop_early_branch(
m_state.m_imem[i].m_a,
m_state.m_imem[i].m_d);
try {
m_state.m_imem[i+1].m_d = readio(m_state.m_imem[i+1].m_a);
m_state.m_imem[i+1].m_valid = true;
} catch(BUSERR be) {
m_state.m_imem[i+1].m_valid = false;
}
}
 
m_state.m_smem[0].m_a = m_state.m_sp;
for(int i=1; i<5; i++)
m_state.m_smem[i].m_a = m_state.m_smem[i-1].m_a+1;
for(int i=0; i<5; i++) {
m_state.m_smem[i].m_valid = true;
if (m_state.m_smem[i].m_a < 0x2000)
m_state.m_smem[i].m_valid = false;
else if (m_state.m_smem[i].m_a < 0x4000)
m_state.m_smem[i].m_valid = true;
else if (m_state.m_smem[i].m_a < 0x800000)
m_state.m_smem[i].m_valid = false;
else if (m_state.m_smem[i].m_a < 0x1000000)
m_state.m_smem[i].m_valid = true;
else
m_state.m_smem[i].m_valid = false;
if (m_state.m_smem[i].m_valid)
try {
m_state.m_smem[i].m_d = readio(m_state.m_smem[i].m_a);
m_state.m_smem[i].m_valid = true;
} catch(BUSERR be) {
m_state.m_smem[i].m_valid = false;
}
}
m_state.m_valid = true;
}
 
void kill(void) { m_fpga->kill(); }
void close(void) { m_fpga->close(); }
void writeio(const BUSW a, const BUSW v) { m_fpga->writeio(a, v); }
189,193 → 85,86
void clear(void) { m_fpga->clear(); }
 
void reset(void) { writeio(R_ZIPCTRL, CPU_RESET|CPU_HALT); }
void step(void) { writeio(R_ZIPCTRL, CPU_STEP); m_state.step(); }
void step(void) { writeio(R_ZIPCTRL, CPU_STEP); }
void go(void) { writeio(R_ZIPCTRL, CPU_GO); }
void halt(void) { writeio(R_ZIPCTRL, CPU_HALT); }
bool stalled(void) { return ((readio(R_ZIPCTRL)&CPU_STALL)==0); }
 
void show_user_timers(bool v) {
m_show_users_timers = v;
void showval(int y, int x, const char *lbl, unsigned int v) {
mvprintw(y,x, "%s: 0x%08x", lbl, v);
}
 
void toggle_cc(void) {
m_show_cc = !m_show_cc;
void dispreg(int y, int x, const char *n, unsigned int v) {
// 4,4,8,1 = 17 of 20, +3 = 19
mvprintw(y, x, "%s: 0x%08x", n, v);
}
 
void showval(int y, int x, const char *lbl, unsigned int v, bool c) {
if (c)
mvprintw(y,x, ">%s> 0x%08x<", lbl, v);
else
mvprintw(y,x, " %s: 0x%08x ", lbl, v);
}
void showins(int y, const char *lbl,
const int gie, const unsigned int pc) {
char line[80];
unsigned int v;
 
void dispreg(int y, int x, const char *n, unsigned int v, bool c) {
// 4,4,8,1 = 17 of 20, +2 = 18
if (c)
mvprintw(y, x, ">%s> 0x%08x<", n, v);
else
mvprintw(y, x, " %s: 0x%08x ", n, v);
}
mvprintw(y, 0, "%s: 0x%08x", lbl, pc);
 
int showins(int y, const char *lbl, const unsigned int pcidx) {
char la[80], lb[80];
int r = y-1;
 
mvprintw(y, 0, "%s0x%08x", lbl, m_state.m_imem[pcidx].m_a);
 
if (m_state.m_gie) attroff(A_BOLD);
if (gie) attroff(A_BOLD);
else attron(A_BOLD);
 
la[0] = '\0';
lb[0] = '\0';
if (m_state.m_imem[pcidx].m_valid) {
zipi_to_string(m_state.m_imem[pcidx].m_d, la, lb);
printw(" 0x%08x", m_state.m_imem[pcidx].m_d);
printw(" %-25s", la);
if (lb[0]) {
mvprintw(y-1, 0, "%s", lbl);
mvprintw(y-1, strlen(lbl)+10+3+8+2, "%-25s", lb);
r--;
}
} else {
printw(" 0x-------- %-25s", "(Bus Error)");
line[0] = '\0';
try {
v= readio(pc);
zipi_to_string(v, line);
printw(" 0x%08x", v);
printw(" %-24s", &line[1]);
} catch(BUSERR b) {
printw(" 0x%08x %-24s", b.addr, "(Bus Error)");
}
attroff(A_BOLD);
 
return r;
}
 
void showstack(int y, const char *lbl, const unsigned int idx) {
mvprintw(y, 27+26, "%s%08x ", lbl, m_state.m_smem[idx].m_a);
 
if (m_state.m_gie) attroff(A_BOLD);
else attron(A_BOLD);
 
if (m_state.m_smem[idx].m_valid)
printw("0x%08x", m_state.m_smem[idx].m_d);
else
printw("(Bus Err)");
attroff(A_BOLD);
}
 
unsigned int cmd_read(unsigned int a) {
int errcount = 0;
unsigned int s;
 
writeio(R_ZIPCTRL, CMD_HALT|(a&0x3f));
while((((s=readio(R_ZIPCTRL))&CPU_STALL)== 0)&&(errcount<MAXERR)
&&(!m_user_break))
errcount++;
if (m_user_break) {
endwin();
exit(EXIT_SUCCESS);
} else if (errcount >= MAXERR) {
endwin();
printf("ERR: errcount(%d) >= MAXERR on cmd_read(a=%2x)\n", errcount, a);
printf("ZIPCTRL = 0x%08x", s);
if ((s & 0x0200)==0) printf(" STALL");
if (s & 0x0400) printf(" HALTED");
if ((s & 0x03000)==0x01000)
printf(" SW-HALT");
else {
if (s & 0x01000) printf(" SLEEPING");
if (s & 0x02000) printf(" GIE(UsrMode)");
} printf("\n");
exit(EXIT_FAILURE);
}
writeio(R_ZIPCTRL, CPU_HALT|(a&0x3f));
while((readio(R_ZIPCTRL) & CPU_STALL) == 0)
;
return readio(R_ZIPDATA);
}
 
void cmd_write(unsigned int a, int v) {
int errcount = 0;
unsigned int s;
 
writeio(R_ZIPCTRL, CMD_HALT|(a&0x3f));
while((((s=readio(R_ZIPCTRL))&CPU_STALL)== 0)&&(errcount<MAXERR)
&&(!m_user_break))
errcount++;
if (m_user_break) {
endwin();
exit(EXIT_SUCCESS);
} else if (errcount >= MAXERR) {
endwin();
printf("ERR: errcount(%d) >= MAXERR on cmd_read(a=%2x)\n", errcount, a);
printf("ZIPCTRL = 0x%08x", s);
if ((s & 0x0200)==0) printf(" STALL");
if (s & 0x0400) printf(" HALTED");
if ((s & 0x03000)==0x01000)
printf(" SW-HALT");
else {
if (s & 0x01000) printf(" SLEEPING");
if (s & 0x02000) printf(" GIE(UsrMode)");
} printf("\n");
exit(EXIT_FAILURE);
}
 
writeio(R_ZIPDATA, (unsigned int)v);
}
 
void read_state(void) {
int ln= 0;
bool gie;
 
read_raw_state();
 
if (m_cursor < 0)
m_cursor = 0;
else if (m_cursor >= 44)
m_cursor = 43;
 
mvprintw(ln,0, "Peripherals");
mvprintw(ln,30,"%-50s", "CPU State: ");
mvprintw(ln,40, "CPU State: ");
{
unsigned int v = readio(R_ZIPCTRL);
mvprintw(ln,41, "0x%08x ", v);
// if (v & 0x010000)
// printw("INT ");
if ((v & 0x003000) == 0x03000)
unsigned int v = readio(R_ZIPDATA);
if (v & 0x010000)
printw("EXT-INT ");
if (v & 0x002000)
printw("Supervisor Mod ");
if (v & 0x001000)
printw("Sleeping ");
else if (v & 0x001000)
printw("Halted ");
else if (v & 0x002000)
printw("User Mode ");
else
printw("Supervisor mode ");
if (v& 0x0200) {
v = m_state.m_sR[15];
} else printw("Stalled ");
// if (v & 0x008000)
// printw("Break-Enabled ");
// if (v & 0x000080)
// printw("PIC Enabled ");
} ln++;
showval(ln, 0, "PIC ", m_state.m_p[0], (m_cursor==0));
showval(ln,20, "WDT ", m_state.m_p[1], (m_cursor==1));
showval(ln,40, "WBUS", m_state.m_p[2], (m_cursor==2));
showval(ln,60, "PIC2", m_state.m_p[3], (m_cursor==3));
if (v & 0x008000)
printw("Break-Enabled ");
}
ln++;
showval(ln, 0, "TMRA", m_state.m_p[4], (m_cursor==4));
showval(ln,20, "TMRB", m_state.m_p[5], (m_cursor==5));
showval(ln,40, "TMRC", m_state.m_p[6], (m_cursor==6));
showval(ln,60, "JIF ", m_state.m_p[7], (m_cursor==7));
showval(ln, 1, "PIC ", cmd_read(32+ 0));
showval(ln,21, "WDT ", cmd_read(32+ 1));
showval(ln,41, "CACH", cmd_read(32+ 2));
showval(ln,61, "PIC2", cmd_read(32+ 3));
ln++;
showval(ln, 1, "TMRA", cmd_read(32+ 4));
showval(ln,21, "TMRB", cmd_read(32+ 5));
showval(ln,41, "TMRC", cmd_read(32+ 6));
showval(ln,61, "JIF ", cmd_read(32+ 7));
 
ln++;
if (!m_show_users_timers) {
showval(ln, 0, "MTSK", m_state.m_p[ 8], (m_cursor==8));
showval(ln,20, "MOST", m_state.m_p[ 9], (m_cursor==9));
showval(ln,40, "MPST", m_state.m_p[10], (m_cursor==10));
showval(ln,60, "MICT", m_state.m_p[11], (m_cursor==11));
} else {
showval(ln, 0, "UTSK", m_state.m_p[12], (m_cursor==8));
showval(ln,20, "UMST", m_state.m_p[13], (m_cursor==9));
showval(ln,40, "UPST", m_state.m_p[14], (m_cursor==10));
showval(ln,60, "UICT", m_state.m_p[15], (m_cursor==11));
}
showval(ln, 1, "UTSK", cmd_read(32+12));
showval(ln,21, "UMST", cmd_read(32+13));
showval(ln,41, "UPST", cmd_read(32+14));
showval(ln,61, "UAST", cmd_read(32+15));
 
ln++;
ln++;
unsigned int cc = m_state.m_sR[14];
unsigned int cc = cmd_read(14);
gie = (cc & 0x020);
if (gie)
attroff(A_BOLD);
384,45 → 173,33
mvprintw(ln, 0, "Supervisor Registers");
ln++;
 
dispreg(ln, 0, "sR0 ", m_state.m_sR[0], (m_cursor==12));
dispreg(ln,20, "sR1 ", m_state.m_sR[1], (m_cursor==13));
dispreg(ln,40, "sR2 ", m_state.m_sR[2], (m_cursor==14));
dispreg(ln,60, "sR3 ", m_state.m_sR[3], (m_cursor==15)); ln++;
dispreg(ln, 1, "sR0 ", cmd_read(0));
dispreg(ln,21, "sR1 ", cmd_read(1));
dispreg(ln,41, "sR2 ", cmd_read(2));
dispreg(ln,61, "sR3 ", cmd_read(3)); ln++;
 
dispreg(ln, 0, "sR4 ", m_state.m_sR[4], (m_cursor==16));
dispreg(ln,20, "sR5 ", m_state.m_sR[5], (m_cursor==17));
dispreg(ln,40, "sR6 ", m_state.m_sR[6], (m_cursor==18));
dispreg(ln,60, "sR7 ", m_state.m_sR[7], (m_cursor==19)); ln++;
dispreg(ln, 1, "sR4 ", cmd_read(4));
dispreg(ln,21, "sR5 ", cmd_read(5));
dispreg(ln,41, "sR6 ", cmd_read(6));
dispreg(ln,61, "sR7 ", cmd_read(7)); ln++;
 
dispreg(ln, 0, "sR8 ", m_state.m_sR[ 8], (m_cursor==20));
dispreg(ln,20, "sR9 ", m_state.m_sR[ 9], (m_cursor==21));
dispreg(ln,40, "sR10", m_state.m_sR[10], (m_cursor==22));
dispreg(ln,60, "sR11", m_state.m_sR[11], (m_cursor==23)); ln++;
dispreg(ln, 1, "sR8 ", cmd_read( 8));
dispreg(ln,21, "sR9 ", cmd_read( 9));
dispreg(ln,41, "sR10", cmd_read(10));
dispreg(ln,61, "sR11", cmd_read(11)); ln++;
 
dispreg(ln, 0, "sR12", m_state.m_sR[12], (m_cursor==24));
dispreg(ln,20, "sSP ", m_state.m_sR[13], (m_cursor==25));
dispreg(ln, 1, "sR12", cmd_read(12));
dispreg(ln,21, "sSP ", cmd_read(13));
 
if (m_show_cc) {
mvprintw(ln,40, " sCC :%16s", "");
dispreg(ln, 40, "sCC ", m_state.m_sR[14], (m_cursor==26));
} else {
mvprintw(ln,40, " sCC :%16s", "");
mvprintw(ln,40, "%ssCC :%s%s%s%s%s%s%s",
(m_cursor == 26)?">":" ",
(cc&0x1000)?"FE":"", // Floating point exception
(cc&0x0800)?"DV":"", // Division by zero
(cc&0x0400)?"BE":"", // Bus Error
(cc&0x0200)?"TP":"", // Trap
(cc&0x0100)?"IL":"", // Illegal instruction
(cc&0x0080)?"BK":"", // Break
((gie==0)&&(cc&0x0010))?"HLT":""); // Halted
mvprintw(ln,54,"%s%s%s%s",
(cc&8)?"V":" ",
(cc&4)?"N":" ",
(cc&2)?"C":" ",
(cc&1)?"Z":" ");
}
dispreg(ln,60, "sPC ", m_state.m_sR[15], (m_cursor==27));
mvprintw(ln,41, "sCC :%s%s%s%s%s%s%s",
(cc & 0x040)?"STP":" ",
(cc & 0x020)?"GIE":" ",
(cc & 0x010)?"SLP":" ",
(cc&8)?"V":" ",
(cc&4)?"N":" ",
(cc&2)?"C":" ",
(cc&1)?"Z":" ");
mvprintw(ln,61, "sPC : 0x%08x", cmd_read(15));
ln++;
 
if (gie)
430,169 → 207,48
else
attroff(A_BOLD);
mvprintw(ln, 0, "User Registers"); ln++;
dispreg(ln, 0, "uR0 ", m_state.m_uR[0], (m_cursor==28));
dispreg(ln,20, "uR1 ", m_state.m_uR[1], (m_cursor==29));
dispreg(ln,40, "uR2 ", m_state.m_uR[2], (m_cursor==30));
dispreg(ln,60, "uR3 ", m_state.m_uR[3], (m_cursor==31)); ln++;
dispreg(ln, 1, "uR0 ", cmd_read(16));
dispreg(ln,21, "uR1 ", cmd_read(17));
dispreg(ln,41, "uR2 ", cmd_read(18));
dispreg(ln,61, "uR3 ", cmd_read(19)); ln++;
 
dispreg(ln, 0, "uR4 ", m_state.m_uR[4], (m_cursor==32));
dispreg(ln,20, "uR5 ", m_state.m_uR[5], (m_cursor==33));
dispreg(ln,40, "uR6 ", m_state.m_uR[6], (m_cursor==34));
dispreg(ln,60, "uR7 ", m_state.m_uR[7], (m_cursor==35)); ln++;
dispreg(ln, 1, "uR4 ", cmd_read(20));
dispreg(ln,21, "uR5 ", cmd_read(21));
dispreg(ln,41, "uR6 ", cmd_read(22));
dispreg(ln,61, "uR7 ", cmd_read(23)); ln++;
 
dispreg(ln, 0, "uR8 ", m_state.m_uR[8], (m_cursor==36));
dispreg(ln,20, "uR9 ", m_state.m_uR[9], (m_cursor==37));
dispreg(ln,40, "uR10", m_state.m_uR[10], (m_cursor==38));
dispreg(ln,60, "uR11", m_state.m_uR[11], (m_cursor==39)); ln++;
dispreg(ln, 1, "uR8 ", cmd_read(24));
dispreg(ln,21, "uR9 ", cmd_read(25));
dispreg(ln,41, "uR10", cmd_read(26));
dispreg(ln,61, "uR11", cmd_read(27)); ln++;
 
dispreg(ln, 0, "uR12", m_state.m_uR[12], (m_cursor==40));
dispreg(ln,20, "uSP ", m_state.m_uR[13], (m_cursor==41));
cc = m_state.m_uR[14];
if (m_show_cc) {
mvprintw(ln,40, " uCC :%16s", "");
dispreg(ln, 40, "uCC ", m_state.m_uR[14], (m_cursor==42));
} else {
mvprintw(ln,40, " uCC :%16s", "");
mvprintw(ln,40, "%suCC :%s%s%s%s%s%s%s",
(m_cursor == 42)?">":" ",
(cc&0x1000)?"FE":"", // Floating point Exception
(cc&0x0800)?"DV":"", // Division by zero
(cc&0x0400)?"BE":"", // Bus Error
(cc&0x0200)?"TP":"", // Trap
(cc&0x0100)?"IL":"", // Illegal instruction
(cc&0x0040)?"ST":"", // Single-step
((gie)&&(cc&0x0010))?"SL":""); // Sleep
mvprintw(ln,54,"%s%s%s%s",
(cc&8)?"V":" ",
(cc&4)?"N":" ",
(cc&2)?"C":" ",
(cc&1)?"Z":" ");
}
dispreg(ln,60, "uPC ", m_state.m_uR[15], (m_cursor==43));
dispreg(ln, 1, "uR12", cmd_read(28));
dispreg(ln,21, "uSP ", cmd_read(29));
cc = cmd_read(30);
mvprintw(ln,41, "uCC :%s%s%s%s%s%s%s",
(cc&0x040)?"STP":" ",
(cc&0x020)?"GIE":" ",
(cc&0x010)?"SLP":" ",
(cc&8)?"V":" ",
(cc&4)?"N":" ",
(cc&2)?"C":" ",
(cc&1)?"Z":" ");
mvprintw(ln,61, "uPC : 0x%08x", cmd_read(31));
 
attroff(A_BOLD);
ln+=2;
 
ln+=3;
 
showins(ln+4, " ", 0);
{
int lclln = ln+3;
for(int i=1; i<5; i++)
lclln = showins(lclln, (i==1)?">":" ", i);
for(int i=0; i<5; i++)
showstack(ln+i, (i==0)?">":" ", i);
}
BUSW pc = cmd_read((gie)?31:15);
showins(ln, "I ", gie, pc+2); ln++;
showins(ln, "Dc", gie, pc+1); ln++;
showins(ln, "Op", gie, pc ); ln++;
showins(ln, "Al", gie, pc-1); ln++;
}
 
void cursor_up(void) {
if (m_cursor > 3)
m_cursor -= 4;
} void cursor_down(void) {
if (m_cursor < 40)
m_cursor += 4;
} void cursor_left(void) {
if (m_cursor > 0)
m_cursor--;
else m_cursor = 43;
} void cursor_right(void) {
if (m_cursor < 43)
m_cursor++;
else m_cursor = 0;
}
 
int cursor(void) { return m_cursor; }
};
 
const int ZIPPY::MAXERR = 100000;
 
DEVBUS *m_fpga;
 
void get_value(ZIPPY *zip) {
int wy, wx, ra;
int c = zip->cursor();
 
wx = (c & 0x03) * 20 + 9 + 1;
wy = (c >> 2);
if (wy >= 3+4)
wy++;
if (wy > 3)
wy += 2;
wy++;
 
if (c >= 12)
ra = c - 12;
else
ra = c + 32;
 
bool done = false;
char str[16];
int pos = 0; str[pos] = '\0';
attron(A_NORMAL | A_UNDERLINE);
mvprintw(wy, wx, "%-8s", "");
while(!done) {
int chv = getch();
switch(chv) {
case KEY_ESCAPE:
pos = 0; str[pos] = '\0'; done = true;
break;
case KEY_RETURN: case KEY_ENTER: case KEY_UP: case KEY_DOWN:
done = true;
break;
case KEY_LEFT: case KEY_BACKSPACE:
if (pos > 0) pos--;
break;
case KEY_CLEAR:
pos = 0;
break;
case '0': case ' ': str[pos++] = '0'; break;
case '1': str[pos++] = '1'; break;
case '2': str[pos++] = '2'; break;
case '3': str[pos++] = '3'; break;
case '4': str[pos++] = '4'; break;
case '5': str[pos++] = '5'; break;
case '6': str[pos++] = '6'; break;
case '7': str[pos++] = '7'; break;
case '8': str[pos++] = '8'; break;
case '9': str[pos++] = '9'; break;
case 'A': case 'a': str[pos++] = 'A'; break;
case 'B': case 'b': str[pos++] = 'B'; break;
case 'C': case 'c': str[pos++] = 'C'; break;
case 'D': case 'd': str[pos++] = 'D'; break;
case 'E': case 'e': str[pos++] = 'E'; break;
case 'F': case 'f': str[pos++] = 'F'; break;
}
 
if (pos > 8)
pos = 8;
str[pos] = '\0';
 
attron(A_NORMAL | A_UNDERLINE);
mvprintw(wy, wx, "%-8s", str);
if (pos > 0) {
attron(A_NORMAL | A_UNDERLINE | A_BLINK);
mvprintw(wy, wx+pos-1, "%c", str[pos-1]);
}
attrset(A_NORMAL);
}
 
if (pos > 0) {
int v;
v = strtoul(str, NULL, 16);
zip->cmd_write(ra, v);
}
}
 
void on_sigint(int v) {
endwin();
 
fprintf(stderr, "Interrupted!\n");
exit(-2);
}
 
void stall_screen(void) {
erase();
mvprintw(0,0, "CPU is stalled. (Q to quit)\n");
}
 
int main(int argc, char **argv) {
// FPGAOPEN(m_fpga);
ZIPPY *zip = new ZIPPY(m_fpga);
602,8 → 258,6
noecho();
keypad(stdscr, true);
 
signal(SIGINT, on_sigint);
 
int chv;
bool done = false;
 
612,27 → 266,15
;
if (!zip->stalled())
zip->read_state();
else
stall_screen();
while((!done)&&(!gbl_err)) {
while(!done) {
chv = getch();
switch(chv) {
case 'c': case 'C':
zip->toggle_cc();
break;
case 'g': case 'G':
m_fpga->writeio(R_ZIPCTRL, CPU_GO);
// We just released the CPU, so we're now done.
done = true;
break;
case 'l': case 'L': case CTRL('L'):
redrawwin(stdscr);
case 'm': case 'M':
zip->show_user_timers(false);
break;
case 'q': case 'Q': case CTRL('C'):
case KEY_CANCEL: case KEY_CLOSE: case KEY_EXIT:
case KEY_ESCAPE:
case 'q': case 'Q':
done = true;
break;
case 'r': case 'R':
639,47 → 281,20
zip->reset();
erase();
break;
case 't': case 'T':
case 's': case 'S':
zip->step();
break;
case 'u': case 'U':
zip->show_user_timers(true);
break;
case '\r': case '\n':
case KEY_IC: case KEY_ENTER:
get_value(zip);
break;
case KEY_UP:
zip->cursor_up();
break;
case KEY_DOWN:
zip->cursor_down();
break;
case KEY_LEFT:
zip->cursor_left();
break;
case KEY_RIGHT:
zip->cursor_right();
break;
case ERR: case KEY_CLEAR:
case ERR:
default:
;
}
 
if ((done)||(gbl_err))
break;
else if (zip->stalled())
stall_screen();
if (zip->stalled())
erase();
else
zip->read_state();
}
 
endwin();
 
if (gbl_err) {
printf("Killed on error: could not access bus!\n");
exit(-2);
}
}
 
/zipcpu/trunk/sw/zipdbg/regdefs.h
1,4 → 1,4
////////////////////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////////////////
//
// Filename: regdefs.h
//
6,19 → 6,19
//
// Purpose: This is a generic file that will need to be modified from one
// board implementation of the ZIP CPU to another. Specifically,
// this file defines where items are on a WISHBONE bus. In this case, the
// Zip CPU debug addresses are found at 0x060 and 0x61--but they need not
// be at those addresses in your application. The Zip Debugger needs to
// know these addresses in order to know what addresses to peek and poke
// to control and access the Zip CPU.
// this file defines where items are on a WISHBONE bus. In this
// case, the Zip CPU debug addresses are found at 0x060 and 0x61.
// The Zip Debugger needs to know these addresses in order to
// know what addresses to peek and poke to control and access the
// Zip CPU.
//
//
// Creator: Dan Gisselquist, Ph.D.
// Creator: Dan Gisselquist
// Gisselquist Technology, LLC
//
////////////////////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2015-2016, Gisselquist Technology, LLC
// Copyright (C) 2015, Gisselquist Technology, LLC
//
// This program is free software (firmware): you can redistribute it and/or
// modify it under the terms of the GNU General Public License as published
34,7 → 34,7
// http://www.gnu.org/licenses/gpl.html
//
//
////////////////////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////////////////
//
//
#ifndef REGDEFS_H
44,6 → 44,13
#define R_ZIPCTRL 0x00000060
#define R_ZIPDATA 0x00000061
 
// RAM memory space
#define RAMBASE 0x00008000
// Flash memory space
#define QSPIFLASH 0x00100000
 
#define RAMLEN 0x08000
 
#define CPU_GO 0x0000
#define CPU_RESET 0x0040
#define CPU_INT 0x0080
/zipcpu/trunk/sw/zipdbg/devbus.h
1,4 → 1,4
////////////////////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////////////////
//
// Filename: devbus.h
//
5,24 → 5,17
// Project: UART to WISHBONE FPGA library
//
// Purpose: The purpose of this file is to document an interface which
// any device with a bus, whether it be implemented over a UART,
// an ethernet, or a PCI express bus, must implement. This describes
// only an interface, and not how that interface is to be accomplished.
// any devic with a bus, whether it be implemented over a UART,
// an ethernet, or a PCI express bus, must implement. This
// describes only an interface, and not how that interface is
// to be accomplished.
//
// The neat part of this interface is that, if programs are designed to
// work with it, than the implementation details may be changed later
// and any program that once worked with the interface should be able
// to continue to do so. (i.e., switch from a UART controlled bus to a
// PCI express controlled bus, with minimal change to the software of
// interest.)
//
//
// Creator: Dan Gisselquist, Ph.D.
// Creator: Dan Gisselquist
// Gisselquist Technology, LLC
//
////////////////////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2015-2016, Gisselquist Technology, LLC
// Copyright (C) 2015, Gisselquist Technology, LLC
//
// This program is free software (firmware): you can redistribute it and/or
// modify it under the terms of the GNU General Public License as published
38,7 → 31,7
// http://www.gnu.org/licenses/gpl.html
//
//
////////////////////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////////////////
//
//
#ifndef DEVBUS_H
62,56 → 55,18
virtual void close(void) = 0;
 
// Write a single value to a single address
// a is the address of the value to be read as it exists on the
// wishbone bus within the FPGA.
// v is the singular value to write to this address
virtual void writeio(const BUSW a, const BUSW v) = 0;
 
// Read a single value to a single address
// a is the address of the value to be read as it exists on the
// wishbone bus within the FPGA.
// This function returns the value read from the device wishbone
// at address a.
virtual BUSW readio(const BUSW a) = 0;
 
// Read a series of values from values from a block of memory
// a is the address of the value to be read as it exists on the
// wishbone bus within the FPGA.
// len is the number of words to read
// buf is a pointer to a place to store the words once read.
// This is equivalent to:
// for(int i=0; i<len; i++)
// buf[i] = readio(a+i);
// only it's faster in our implementation.
virtual void readi(const BUSW a, const int len, BUSW *buf) = 0;
 
// Read a series of values from the same address in memory. This
// call is identical to readi, save that the address is not incremented
// from one read to the next. It is equivalent to:
// for(int i=0; i<len; i++)
// buf[i] = readio(a);
// only it's faster in our implementation.
//
// Read a series of values from the same address in memory
virtual void readz(const BUSW a, const int len, BUSW *buf) = 0;
 
// Write a series of values into a block of memory on the FPGA
// a is the address of the value to be written as it exists on the
// wishbone bus within the FPGA.
// len is the number of words to write
// buf is a pointer to a place to from whence to grab the data
// to be written.
// This is equivalent to:
// for(int i=0; i<len; i++)
// writeio(a+i, buf[i]);
// only it's faster in our implementation.
virtual void writei(const BUSW a, const int len, const BUSW *buf) = 0;
// Write a series of values into the same address on the FPGA bus. This
// call is identical to writei, save that the address is not incremented
// from one write to the next. It is equivalent to:
// for(int i=0; i<len; i++)
// writeio(a, buf[i]);
// only it's faster in our implementation.
//
virtual void writez(const BUSW a, const int len, const BUSW *buf) = 0;
 
// Query whether or not an interrupt has taken place
135,8 → 90,6
// Clear any interrupt condition that has already been noticed by
// the interface, does not check for further interrupt
virtual void clear(void) = 0;
 
virtual ~DEVBUS(void) { };
};
 
#endif
/zipcpu/trunk/sw/zipdbg/README
1,4 → 1,3
#Zip Debugger
 
This directory contains the Zip System Debugger. If you wish to use it,
you'll need to define something that implements the DEVBUS interface,

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