URL
https://opencores.org/ocsvn/zipcpu/zipcpu/trunk
Subversion Repositories zipcpu
Compare Revisions
- This comparison shows the changes necessary to convert path
/zipcpu/trunk/bench/cpp
- from Rev 186 to Rev 187
- ↔ Reverse comparison
Rev 186 → Rev 187
/zippy_tb.cpp
15,7 → 15,7
// |
/////////////////////////////////////////////////////////////////////////////// |
// |
// Copyright (C) 2015, Gisselquist Technology, LLC |
// Copyright (C) 2015-2016, Gisselquist Technology, LLC |
// |
// This program is free software (firmware): you can redistribute it and/or |
// modify it under the terms of the GNU General Public License as published |
99,6 → 99,8
} |
}; |
|
extern FILE *gbl_dbgfp; |
FILE *gbl_dbgfp = NULL; |
|
// No particular "parameters" need definition or redefinition here. |
class ZIPPY_TB : public TESTB<Vzipsystem> { |
116,9 → 118,11
if (false) { |
m_dbgfp = fopen("dbg.txt", "w"); |
dbg_flag = true; |
gbl_dbgfp = m_dbgfp; |
} else { |
m_dbgfp = NULL; |
dbg_flag = false; |
gbl_dbgfp = NULL; |
} |
bomb = false; |
m_cursor = 0; |
479,7 → 483,7
&&(m_core->v__DOT__thecpu__DOT__wr_reg_ce) |
?"V" |
:(((m_core->v__DOT__thecpu__DOT__wr_flags_ce) |
&&(!m_core->v__DOT__thecpu__DOT__alu_gie))?"+" |
&&(!m_core->v__DOT__thecpu__DOT__r_alu_gie))?"+" |
:" ")); |
ln++; |
|
493,7 → 497,7
(m_core->v__DOT__thecpu__DOT__dcdR_wr)?"W":" ", |
(m_core->v__DOT__thecpu__DOT__dcdF_wr)?"F":" "); |
mvprintw(ln, 62, "OPR =%02x %s%s", |
m_core->v__DOT__thecpu__DOT__opR, |
m_core->v__DOT__thecpu__DOT__r_opR, |
(m_core->v__DOT__thecpu__DOT__opR_wr)?"W":" ", |
(m_core->v__DOT__thecpu__DOT__opF_wr)?"F":" "); |
ln++; |
540,7 → 544,7
&&(m_core->v__DOT__thecpu__DOT__wr_reg_ce) |
?"V" |
:(((m_core->v__DOT__thecpu__DOT__wr_flags_ce) |
&&(m_core->v__DOT__thecpu__DOT__alu_gie))?"+" |
&&(m_core->v__DOT__thecpu__DOT__r_alu_gie))?"+" |
:" ")); |
|
attroff(A_BOLD); |
563,7 → 567,9
m_core->v__DOT__thecpu__DOT__pf__DOT__vmask, |
(m_core->v__DOT__thecpu__DOT__pf__DOT__r_v)?"V":" ", |
(m_core->v__DOT__thecpu__DOT__pf_illegal)?"I":" ", |
m_core->v__DOT__thecpu__DOT__pf__DOT__tagval, |
(m_core->v__DOT__thecpu__DOT__pf__DOT__tagsrc) |
?(m_core->v__DOT__thecpu__DOT__pf__DOT__tagvalipc) |
:(m_core->v__DOT__thecpu__DOT__pf__DOT__tagvallst), |
m_core->v__DOT__thecpu__DOT__pf_pc, |
m_core->v__DOT__thecpu__DOT__pf__DOT__lastpc); |
|
580,8 → 586,8
#endif |
|
mvprintw(ln, 0, "MEMBUS: %3s %3s %s @0x%08x[0x%08x] -> %s %s %08x", |
(m_core->v__DOT__thecpu__DOT__mem_cyc_gbl)?"GCY" |
:((m_core->v__DOT__thecpu__DOT__mem_cyc_lcl)?"LCY":" "), |
(m_core->v__DOT__thecpu__DOT__domem__DOT__r_wb_cyc_gbl)?"GCY" |
:((m_core->v__DOT__thecpu__DOT__domem__DOT__r_wb_cyc_lcl)?"LCY":" "), |
(m_core->v__DOT__thecpu__DOT__mem_stb_gbl)?"GSB" |
:((m_core->v__DOT__thecpu__DOT__mem_stb_lcl)?"LSB":" "), |
(m_core->v__DOT__thecpu__DOT__mem_we )?"WE":" ", |
617,7 → 623,8
(m_core->v__DOT__thecpu__DOT__mem_ce), |
(m_core->v__DOT__thecpu__DOT__master_ce), //1 |
(m_core->v__DOT__thecpu__DOT__opvalid_mem), //0 |
(!m_core->v__DOT__thecpu__DOT__clear_pipeline), //1 |
(!m_core->v__DOT__thecpu__DOT__new_pc), //1 |
// (!m_core->v__DOT__thecpu__DOT__clear_pipeline), //1 |
(m_core->v__DOT__thecpu__DOT__set_cond), //1 |
(!mem_stalled()), //1 |
|
685,7 → 692,7
showins(ln, "Op", |
op_ce(), |
m_core->v__DOT__thecpu__DOT__opvalid, |
m_core->v__DOT__thecpu__DOT__op_gie, |
m_core->v__DOT__thecpu__DOT__r_op_gie, |
m_core->v__DOT__thecpu__DOT__op_stall, |
op_pc(), |
#ifdef OPT_VLIW |
708,7 → 715,7
showins(ln, "Mm", |
m_core->v__DOT__thecpu__DOT__mem_ce, |
m_core->v__DOT__thecpu__DOT__mem_pc_valid, |
m_core->v__DOT__thecpu__DOT__alu_gie, |
m_core->v__DOT__thecpu__DOT__r_alu_gie, |
#ifdef OPT_PIPELINED |
m_core->v__DOT__thecpu__DOT__mem_stall, |
#else |
725,7 → 732,7
showins(ln, "Al", |
m_core->v__DOT__thecpu__DOT__alu_ce, |
m_core->v__DOT__thecpu__DOT__alu_pc_valid, |
m_core->v__DOT__thecpu__DOT__alu_gie, |
m_core->v__DOT__thecpu__DOT__r_alu_gie, |
#ifdef OPT_PIPELINED |
m_core->v__DOT__thecpu__DOT__alu_stall, |
#else |
753,14 → 760,14
// mvprintw(ln-1,10,"i"); |
|
mvprintw(ln-5, 65,"%s %s", |
(m_core->v__DOT__thecpu__DOT__op_break)?"OB":" ", |
(m_core->v__DOT__thecpu__DOT__clear_pipeline)?"CLRP":" "); |
(m_core->v__DOT__thecpu__DOT__r_op_break)?"OB":" ", |
(m_core->v__DOT__thecpu__DOT__new_pc)?"CLRP":" "); |
mvprintw(ln-4, 48, |
(m_core->v__DOT__thecpu__DOT__new_pc)?"new-pc":" "); |
printw("(%s:%02x,%x)", |
(m_core->v__DOT__thecpu__DOT__set_cond)?"SET":" ", |
(m_core->v__DOT__thecpu__DOT__opF&0x0ff), |
(m_core->v__DOT__thecpu__DOT__op_gie) |
(m_core->v__DOT__thecpu__DOT__r_op_gie) |
? (m_core->v__DOT__thecpu__DOT__w_uflags) |
: (m_core->v__DOT__thecpu__DOT__w_iflags)); |
|
776,7 → 783,7
m_core->v__DOT__thecpu__DOT__opB); |
*/ |
mvprintw(ln-3, 48, "Op(%x)%8x,%8x->", |
m_core->v__DOT__thecpu__DOT__opn, |
m_core->v__DOT__thecpu__DOT__r_opn, |
m_core->v__DOT__thecpu__DOT__opA, |
m_core->v__DOT__thecpu__DOT__opB); |
if (m_core->v__DOT__thecpu__DOT__alu_valid) |
816,11 → 823,11
endwin(); |
|
printf("ERR: errcount >= MAXERR on wb_read(a=%x)\n", a); |
printf("Clear-Pipeline = %d\n", m_core->v__DOT__thecpu__DOT__clear_pipeline); |
printf("cpu-dbg-stall = %d\n", m_core->v__DOT__cpu_dbg_stall); |
// printf("Clear-Pipeline = %d\n", m_core->v__DOT__thecpu__DOT__clear_pipeline); |
printf("cpu-dbg-stall = %d\n", m_core->v__DOT__thecpu__DOT__r_halted); |
printf("pf_cyc = %d\n", m_core->v__DOT__thecpu__DOT__pf_cyc); |
printf("mem_cyc_gbl = %d\n", m_core->v__DOT__thecpu__DOT__mem_cyc_gbl); |
printf("mem_cyc_lcl = %d\n", m_core->v__DOT__thecpu__DOT__mem_cyc_lcl); |
printf("mem_cyc_gbl = %d\n", (m_core->v__DOT__thecpu__DOT__domem__DOT__r_wb_cyc_gbl)); |
printf("mem_cyc_lcl = %d\n", m_core->v__DOT__thecpu__DOT__domem__DOT__r_wb_cyc_lcl); |
printf("opvalid = %d\n", m_core->v__DOT__thecpu__DOT__opvalid); |
printf("dcdvalid = %d\n", dcdvalid()?1:0); |
printf("dcd_ce = %d\n", dcd_ce()?1:0); |
973,7 → 980,7
mvprintw(ln, 42, "DCDR=%02x %s", |
dcdR(), (m_core->v__DOT__thecpu__DOT__dcdR_wr)?"W":" "); |
mvprintw(ln, 62, "OPR =%02x %s%s", |
m_core->v__DOT__thecpu__DOT__opR, |
m_core->v__DOT__thecpu__DOT__r_opR, |
(m_core->v__DOT__thecpu__DOT__opR_wr)?"W":" ", |
(m_core->v__DOT__thecpu__DOT__opF_wr)?"F":" "); |
ln++; |
1053,7 → 1060,7
showins(ln, "Op", |
op_ce(), |
m_core->v__DOT__thecpu__DOT__opvalid, |
m_core->v__DOT__thecpu__DOT__op_gie, |
m_core->v__DOT__thecpu__DOT__r_op_gie, |
m_core->v__DOT__thecpu__DOT__op_stall, |
op_pc(), |
#ifdef OPT_VLIW |
1067,7 → 1074,7
showins(ln, "Mm", |
m_core->v__DOT__thecpu__DOT__mem_ce, |
m_core->v__DOT__thecpu__DOT__mem_pc_valid, |
m_core->v__DOT__thecpu__DOT__alu_gie, |
m_core->v__DOT__thecpu__DOT__r_alu_gie, |
#ifdef OPT_PIPELINED |
m_core->v__DOT__thecpu__DOT__mem_stall, |
#else |
1084,7 → 1091,7
showins(ln, "Al", |
m_core->v__DOT__thecpu__DOT__alu_ce, |
m_core->v__DOT__thecpu__DOT__alu_pc_valid, |
m_core->v__DOT__thecpu__DOT__alu_gie, |
m_core->v__DOT__thecpu__DOT__r_alu_gie, |
#ifdef OPT_PIPELINED |
m_core->v__DOT__thecpu__DOT__alu_stall, |
#else |
1109,10 → 1116,16
*/ |
|
int stb = m_core->o_wb_stb; |
if ((m_core->o_wb_addr & (-1<<20))!=1) |
m_core->i_wb_err = 0; |
if ((m_core->o_wb_addr & (-1<<20))!=(1<<20)) |
stb = 0; |
if ((m_core->o_wb_cyc)&&(m_core->o_wb_stb)&&(!stb)) |
if ((m_core->o_wb_cyc)&&(m_core->o_wb_stb)&&(!stb)) { |
m_core->i_wb_ack = 1; |
m_core->i_wb_err = 1; |
bomb = true; |
if (m_dbgfp) fprintf(m_dbgfp, "BOMB!! (Attempting to access %08x/%08x->%08x)\n", m_core->o_wb_addr, |
(-1<<20), ((m_core->o_wb_addr)&(-1<<20))); |
} |
|
if ((dbg_flag)&&(m_dbgfp)) { |
fprintf(m_dbgfp, "DBG %s %s %s @0x%08x/%d[0x%08x] %s %s [0x%08x] %s %s %s%s%s%s%s%s%s%s%s\n", |
1126,12 → 1139,12
(m_core->o_dbg_stall)?"STALL":" ", |
(m_core->o_dbg_data), |
(m_core->v__DOT__cpu_halt)?"CPU-HALT ":"", |
(m_core->v__DOT__cpu_dbg_stall)?"CPU-DBG_STALL":"", |
(m_core->v__DOT__thecpu__DOT__r_halted)?"CPU-DBG_STALL":"", |
(dcdvalid())?"DCDV ":"", |
(m_core->v__DOT__thecpu__DOT__opvalid)?"OPV ":"", |
(m_core->v__DOT__thecpu__DOT__pf_cyc)?"PCYC ":"", |
(m_core->v__DOT__thecpu__DOT__mem_cyc_gbl)?"GC":" ", |
(m_core->v__DOT__thecpu__DOT__mem_cyc_lcl)?"LC":" ", |
(m_core->v__DOT__thecpu__DOT__domem__DOT__r_wb_cyc_gbl)?"GC":" ", |
(m_core->v__DOT__thecpu__DOT__domem__DOT__r_wb_cyc_lcl)?"LC":" ", |
(m_core->v__DOT__thecpu__DOT__alu_wr)?"ALUW ":"", |
(m_core->v__DOT__thecpu__DOT__alu_ce)?"ALCE ":"", |
(m_core->v__DOT__thecpu__DOT__alu_valid)?"ALUV ":"", |
1154,7 → 1167,7
op_ce(), |
op_pc(), |
dcdA()&0x01f, |
m_core->v__DOT__thecpu__DOT__opR, |
m_core->v__DOT__thecpu__DOT__r_opR, |
m_core->v__DOT__cmd_halt, |
m_core->v__DOT__cpu_halt, |
m_core->v__DOT__thecpu__DOT__alu_ce, |
1192,9 → 1205,9
fprintf(m_dbgfp, "\tbrk=%s %d,%d\n", |
(m_core->v__DOT__thecpu__DOT__master_ce)?"CE":" ", |
m_core->v__DOT__thecpu__DOT__break_en, |
m_core->v__DOT__thecpu__DOT__op_break); |
m_core->v__DOT__thecpu__DOT__r_op_break); |
} else if ((m_dbgfp)&& |
((m_core->v__DOT__thecpu__DOT__op_break) |
((m_core->v__DOT__thecpu__DOT__r_op_break) |
||(m_core->v__DOT__thecpu__DOT__r_alu_illegal) |
||(m_core->v__DOT__thecpu__DOT__dcd_break))) { |
fprintf(m_dbgfp, "NOT SWITCHING TO GIE (gie = %d)\n", gie); |
1202,19 → 1215,21
(m_core->v__DOT__thecpu__DOT__master_ce)?"CE":" ", |
m_core->v__DOT__thecpu__DOT__break_en, |
m_core->v__DOT__thecpu__DOT__dcd_break, |
m_core->v__DOT__thecpu__DOT__op_break, |
m_core->v__DOT__thecpu__DOT__r_op_break, |
m_core->v__DOT__thecpu__DOT__r_alu_illegal); |
} |
|
if (m_dbgfp) { |
if(m_core->v__DOT__thecpu__DOT__clear_pipeline) |
fprintf(m_dbgfp, "\tClear Pipeline\n"); |
// if(m_core->v__DOT__thecpu__DOT__clear_pipeline) |
// fprintf(m_dbgfp, "\tClear Pipeline\n"); |
if(m_core->v__DOT__thecpu__DOT__new_pc) |
fprintf(m_dbgfp, "\tNew PC\n"); |
} |
|
if (m_dbgfp) |
fprintf(m_dbgfp, "----------- TICK ----------\n"); |
fprintf(m_dbgfp, "----------- TICK (%08x) ----------%s\n", |
m_core->v__DOT__jiffies__DOT__r_counter, |
(bomb)?" BOMBED!!":""); |
if (false) { |
m_core->i_clk = 1; |
m_mem(m_core->i_clk, m_core->o_wb_cyc, m_core->o_wb_stb, m_core->o_wb_we, |
1283,7 → 1298,7
dbgins("Op - ", |
op_ce(), |
m_core->v__DOT__thecpu__DOT__opvalid, |
m_core->v__DOT__thecpu__DOT__op_gie, |
m_core->v__DOT__thecpu__DOT__r_op_gie, |
m_core->v__DOT__thecpu__DOT__op_stall, |
op_pc(), |
#ifdef OPT_VLIW |
1300,7 → 1315,7
dbgins("Al - ", |
m_core->v__DOT__thecpu__DOT__alu_ce, |
m_core->v__DOT__thecpu__DOT__alu_pc_valid, |
m_core->v__DOT__thecpu__DOT__alu_gie, |
m_core->v__DOT__thecpu__DOT__r_alu_gie, |
#ifdef OPT_PIPELINED |
m_core->v__DOT__thecpu__DOT__alu_stall, |
#else |
1318,6 → 1333,10
false |
#endif |
); |
if (m_core->v__DOT__thecpu__DOT__wr_reg_ce) |
fprintf(m_dbgfp, "WB::Reg[%2x] <= %08x\n", |
m_core->v__DOT__thecpu__DOT__wr_reg_id, |
m_core->v__DOT__thecpu__DOT__wr_gpreg_vl); |
|
} |
|
1334,20 → 1353,39
m_core->v__DOT__thecpu__DOT__wr_gpreg_vl, |
m_core->v__DOT__thecpu__DOT__wr_spreg_vl, |
(m_core->v__DOT__thecpu__DOT__alu_pc_valid)?"PCV":" ", |
m_core->v__DOT__thecpu__DOT__alu_pc); |
alu_pc()); |
|
fprintf(m_dbgfp, "ALU-PC: %08x %s %s\n", |
m_core->v__DOT__thecpu__DOT__alu_pc, |
alu_pc(), |
(m_core->v__DOT__thecpu__DOT__r_alu_pc_valid)?"VALID":"", |
(m_core->v__DOT__thecpu__DOT__alu_gie)?"ALU-GIE":""); |
(m_core->v__DOT__thecpu__DOT__r_alu_gie)?"ALU-GIE":""); |
} |
|
if ((m_core->v__DOT__thecpu__DOT__alu_pc_valid) |
&&(!m_core->v__DOT__thecpu__DOT__clear_pipeline)) { |
if (m_core->v__DOT__dma_controller__DOT__dma_state) { |
fprintf(m_dbgfp, "DMA[%d]%s%s%s%s@%08x,%08x [%d%d/%4d/%4d] -> [%d%d/%04d/%04d]\n", |
m_core->v__DOT__dma_controller__DOT__dma_state, |
(m_core->v__DOT__dc_cyc)?"C":" ", |
(m_core->v__DOT__dc_stb)?"S":" ", |
(m_core->v__DOT__dc_ack)?"A":" ", |
(m_core->v__DOT__dc_err)?"E":" ", |
m_core->v__DOT__dc_addr, |
(m_core->v__DOT__dc_data), |
m_core->v__DOT__dma_controller__DOT__last_read_request, |
m_core->v__DOT__dma_controller__DOT__last_read_ack, |
m_core->v__DOT__dma_controller__DOT__nracks, |
m_core->v__DOT__dma_controller__DOT__nread, |
m_core->v__DOT__dma_controller__DOT__last_write_request, |
m_core->v__DOT__dma_controller__DOT__last_write_ack, |
m_core->v__DOT__dma_controller__DOT__nwacks, |
m_core->v__DOT__dma_controller__DOT__nwritten); |
} |
if (((m_core->v__DOT__thecpu__DOT__alu_pc_valid) |
||(m_core->v__DOT__thecpu__DOT__mem_pc_valid)) |
&&(!m_core->v__DOT__thecpu__DOT__new_pc)) { |
unsigned long iticks = m_tickcount - m_last_instruction_tickcount; |
if (m_profile_fp) { |
unsigned buf[2]; |
buf[0] = m_core->v__DOT__thecpu__DOT__alu_pc-1; |
buf[0] = alu_pc(); |
buf[1] = iticks; |
fwrite(buf, sizeof(unsigned), 2, m_profile_fp); |
} |
1372,7 → 1410,10
|
bool dcd_ce(void) { |
#ifdef OPT_PIPELINED |
return (m_core->v__DOT__thecpu__DOT__dcd_ce != 0); |
// return (m_core->v__DOT__thecpu__DOT__dcd_ce != 0); |
return ((!m_core->v__DOT__thecpu__DOT__r_dcdvalid) |
||(!m_core->v__DOT__thecpu__DOT__dcd_stalled)) |
&&(m_core->v__DOT__thecpu__DOT__new_pc); |
#else |
return (m_core->v__DOT__thecpu__DOT__pf_valid); |
#endif |
1419,7 → 1460,7
|
wr_write_cc=((m_core->v__DOT__thecpu__DOT__wr_reg_id&0x0f)==0x0e); |
wr_write_pc=((m_core->v__DOT__thecpu__DOT__wr_reg_id&0x0f)==0x0f); |
op_gie = m_core->v__DOT__thecpu__DOT__op_gie; |
op_gie = m_core->v__DOT__thecpu__DOT__r_op_gie; |
|
#ifdef OPT_PIPELINED_BUS_ACCESS |
//a = m_core->v__DOT__thecpu__DOT__mem_pipe_stalled; |
1444,14 → 1485,14
r--; |
return r; |
*/ |
return m_core->v__DOT__thecpu__DOT__alu_pc-1; |
return m_core->v__DOT__thecpu__DOT__r_alu_pc-1; |
} |
|
#ifdef OPT_PIPELINED_BUS_ACCESS |
bool mem_pipe_stalled(void) { |
int r = 0; |
r = ((m_core->v__DOT__thecpu__DOT__mem_cyc_gbl) |
||(m_core->v__DOT__thecpu__DOT__mem_cyc_lcl)); |
r = ((m_core->v__DOT__thecpu__DOT__domem__DOT__r_wb_cyc_gbl) |
||(m_core->v__DOT__thecpu__DOT__domem__DOT__r_wb_cyc_lcl)); |
r = r && ((m_core->v__DOT__thecpu__DOT__mem_stall) |
||( |
((!m_core->v__DOT__thecpu__DOT__mem_stb_gbl) |
1503,8 → 1544,10
mvprintw(0,40, "wb_write -- complete"); |
|
|
if (errcount >= 100) |
if (errcount >= 100) { |
if (m_dbgfp) fprintf(m_dbgfp, "WB-WRITE: ERRCount = %d, BOMB!!\n", errcount); |
bomb = true; |
} |
} |
|
unsigned long wb_read(unsigned a) { |
1534,8 → 1577,10
mvprintw(0,35, "%40s", ""); |
mvprintw(0,40, "wb_read = 0x%08x", v); |
|
if (errcount >= 100) |
if (errcount >= 100) { |
if (m_dbgfp) fprintf(m_dbgfp, "WB-WRITE: ERRCount = %d, BOMB!!\n", errcount); |
bomb = true; |
} |
return v; |
} |
|
1559,7 → 1604,7
|
void jump_to(ZIPI address) { |
m_core->v__DOT__thecpu__DOT__pf_pc = address; |
m_core->v__DOT__thecpu__DOT__clear_pipeline = 1; |
// m_core->v__DOT__thecpu__DOT__clear_pipeline = 1; |
m_core->v__DOT__thecpu__DOT__new_pc = 1; |
} |
|
1683,10 → 1728,10
if (!tb->m_core->v__DOT__thecpu__DOT__gie) { |
tb->m_core->v__DOT__thecpu__DOT__pf_pc = v; |
tb->m_core->v__DOT__thecpu__DOT__new_pc = 1; |
tb->m_core->v__DOT__thecpu__DOT__clear_pipeline = 1; |
// tb->m_core->v__DOT__thecpu__DOT__clear_pipeline = 1; |
tb->m_core->v__DOT__thecpu__DOT__alu_pc_valid = 0; |
#ifdef OPT_PIPELINED |
tb->m_core->v__DOT__thecpu__DOT__dcd_ce = 0; |
// tb->m_core->v__DOT__thecpu__DOT__dcd_ce = 0; |
tb->m_core->v__DOT__thecpu__DOT__r_dcdvalid = 0; |
#endif |
tb->m_core->v__DOT__thecpu__DOT__opvalid = 0; |
1697,10 → 1742,10
if (tb->m_core->v__DOT__thecpu__DOT__gie) { |
tb->m_core->v__DOT__thecpu__DOT__pf_pc = v; |
tb->m_core->v__DOT__thecpu__DOT__new_pc = 1; |
tb->m_core->v__DOT__thecpu__DOT__clear_pipeline = 1; |
// tb->m_core->v__DOT__thecpu__DOT__clear_pipeline = 1; |
tb->m_core->v__DOT__thecpu__DOT__alu_pc_valid = 0; |
#ifdef OPT_PIPELINED |
tb->m_core->v__DOT__thecpu__DOT__dcd_ce = 0; |
// tb->m_core->v__DOT__thecpu__DOT__dcd_ce = 0; |
tb->m_core->v__DOT__thecpu__DOT__r_dcdvalid = 0; |
#endif |
tb->m_core->v__DOT__thecpu__DOT__opvalid = 0; |
2174,7 → 2219,7
|
// For debugging purposes: do we wish to skip some number of |
// instructions to fast forward to a time of interest?? |
for(int i=0; i<0x3f80; i++) { |
for(int i=0; i<0; i++) { |
tb->m_core->v__DOT__cmd_halt = 0; |
tb->tick(); |
} |