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URL https://opencores.org/ocsvn/zipcpu/zipcpu/trunk

Subversion Repositories zipcpu

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  • This comparison shows the changes necessary to convert path
    /zipcpu/trunk/bench
    from Rev 105 to Rev 134
    Reverse comparison

Rev 105 → Rev 134

/cpp/zippy_tb.cpp
434,7 → 434,7
showreg(ln,20, "sSP ", 13, (m_cursor==25));
 
unsigned int cc = m_state.m_sR[14];
if (true) {
if (false) {
mvprintw(ln,40, "%ssCC : 0x%08x",
(m_cursor==26)?">":" ", cc);
} else {
575,7 → 575,7
printw(" %x%x%c%c",
(m_core->v__DOT__thecpu__DOT__domem__DOT__wraddr),
(m_core->v__DOT__thecpu__DOT__domem__DOT__rdaddr),
(m_core->v__DOT__thecpu__DOT__op_pipe)?'P':'-',
(m_core->v__DOT__thecpu__DOT__r_op_pipe)?'P':'-',
(mem_pipe_stalled())?'S':'-'); ln++;
#else
ln++;
605,7 → 605,7
(m_core->v__DOT__thecpu__DOT__opvalid_mem),
(m_core->v__DOT__thecpu__DOT__master_ce),
(mem_pipe_stalled()),
(!m_core->v__DOT__thecpu__DOT__op_pipe),
(!m_core->v__DOT__thecpu__DOT__r_op_pipe),
(m_core->v__DOT__thecpu__DOT__domem__DOT__cyc)
);
printw(" op_pipe = %d", m_core->v__DOT__thecpu__DOT__dcd_pipe);
1345,7 → 1345,7
#ifdef OPT_PIPELINED_BUS_ACCESS
//a = m_core->v__DOT__thecpu__DOT__mem_pipe_stalled;
a = mem_pipe_stalled();
b = (!m_core->v__DOT__thecpu__DOT__op_pipe)&&(mem_busy());
b = (!m_core->v__DOT__thecpu__DOT__r_op_pipe)&&(mem_busy());
#else
a = false;
b = false;
1387,7 → 1387,9
return 0;
else if (m_core->v__DOT__thecpu__DOT__gie)
return (m_mem[m_core->v__DOT__thecpu__DOT__upc] == 0x7bc3dfff);
else
else if (m_mem[m_core->v__DOT__thecpu__DOT__ipc] == 0x7883ffff)
return true; // ADD to PC instruction
else // MOV to PC instruction
return (m_mem[m_core->v__DOT__thecpu__DOT__ipc] == 0x7bc3dfff);
/*
return ((m_core->v__DOT__thecpu__DOT__alu_pc_valid)

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