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URL https://opencores.org/ocsvn/zipcpu/zipcpu/trunk

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  • This comparison shows the changes necessary to convert path 
    /zipcpu/trunk/bench
    from Rev 50 to Rev 57
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  •

Rev 50 → Rev 57

/asm/zipdhry.S
31,7 → 31,14
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;
// Under Verilator:
// DMIPS: 25.57 100 MHz 0.26
// DMIPS: 28.6 100 MHz (sim) 0.29
//
//
// with no loop unrolling nor function inlining
// DMIPS: 24.3 100 MHz (sim) 0.24
// with packed strings
// DMIPS: 35.6 100 MHz (sim) 0.36
//
// For comparison:
// uBlaze: 255 177 MHz 1.44
// LEON3 1.4
41,8 → 48,27
// ZPU 2.6 50 MHz 0.05
//
 
// Some #def's to control compilation.
//
// SKIP_SHORT_CIRCUITS determines whether or not we do internal testing and
// jump to a BUSY instruction on failure for the debugger to pick up. Skip
// this for valid testing.
//
// #define SKIP_SHORT_CIRCUITS
//
// NO_INLINE controls whether or not we inline certain functions. If you
// define this, nothing will be inlined.
// #define NO_INLINE
//
// NO_LOOP_UNROLLING controls loop unrolling. The default is to unroll loops
// by a factor of 4x. By defining this, all loop unrolling is removed.
// #define NO_LOOP_UNROLLING
#define SKIP_SHORT_CIRCUITS
//
// Use PSTRS has to deal with whether or not we are processing packed strings
// or normal strings. Packed strings are really a cheaters exception to the
// dhrystone measure, although they do get our score up.
//
// #define USE_PSTRS
sys.ctr.mtask equ 0xc0000008
// int main(int argc, char **argv) {
// dhrystone();
72,7 → 98,11
 
// typedef int Arr_1_Dim[50];
// typedef int Arr_2_Dim[50][50];
#ifdef USE_PSTRS
#define RECSIZE 12
#else
#define RECSIZE 35
#endif
#define NUMBER_OF_RUNS (512)
ptr_comp equ 0
discr equ 1
114,39 → 144,63
; R0 = d
; R1 = s
; R3 = ch
copy_next_char:
#ifdef NO_LOOP_UNROLLING
copy_next_char:
LOD (R1),R2
STO R2,(R0)
#ifdef USE_PSTRS
TST 255,R2
#else
CMP 0,R2
#endif
RETN.Z
ADD 1,R0
ADD 1,R1
CMP 0,R2
BNZ copy_next_char
BRA copy_next_char
 
 
 
#else
copy_next_char:
LOD (R1),R2
STO R2,(R0)
#ifdef USE_PSTRS
TST 255,R2
#else
CMP 0,R2
STO R2,(R0)
BZ lcl_strcpy_end_of_loop
#endif
; BZ lcl_strcpy_end_of_loop
RETN.Z
LOD 1(R1),R2
STO R2,1(R0)
#ifdef USE_PSTRS
TST 255,R2
#else
CMP 0,R2
STO R2,1(R0)
BZ lcl_strcpy_end_of_loop
#endif
; BZ lcl_strcpy_end_of_loop
RETN.Z
LOD 2(R1),R2
STO R2,2(R0)
#ifdef USE_PSTRS
TST 255,R2
#else
CMP 0,R2
STO R2,2(R0)
BZ lcl_strcpy_end_of_loop
#endif
; BZ lcl_strcpy_end_of_loop
RETN.Z
LOD 3(R1),R2
STO R2,3(R0)
; BZ lcl_strcpy_end_of_loop
#ifdef USE_PSTRS
TST 255,R2
#else
CMP 0,R2
STO R2,3(R0)
BZ lcl_strcpy_end_of_loop
#endif
RETN.Z
ADD 4,R0
ADD 4,R1
CMP 0,R2
BNZ copy_next_char
lcl_strcpy_end_of_loop:
BRA copy_next_char
#endif
RETN
 
//int lcl_strcmp(char *s1, char *s2) {
// char a, b;
163,8 → 217,8
 
strcmp_top_of_loop:
#ifdef NO_LOOP_UNROLLING
LOD (R0),R2
LOD (R1),R3 ; Alternate approach:
; LOD (R0),R2
; LOD (R1),R3 ; Alternate approach:
; CMP R2,R3 ; CMP 0,R2
; BNZ strcmp_end_loop ; BZ strcmp_end_loop
; CMP 0,R2 ; CMP R2,R3
176,32 → 230,54
; BRA strcmp_top_of_loop
LOD (R0),R2
LOD (R1),R3
#ifdef USE_PSTRS
TST 255,R2
#else
CMP 0,R2
#endif
BZ strcmp_end_loop
ADD 1,R0
ADD 1,R1
CMP R2,R3
BZ strcmp_top_of_loop
#else
LOD (R0),R2
LOD (R1),R3
#ifdef USE_PSTRS
TST 255,R2
#else
CMP 0,R2
#endif
BZ strcmp_end_loop
CMP R2,R3
BNZ strcmp_end_loop
LOD 1(R0),R2
LOD 1(R1),R3
#ifdef USE_PSTRS
TST 255,R2
#else
CMP 0,R2
#endif
BZ strcmp_end_loop
CMP R2,R3
BNZ strcmp_end_loop
LOD 2(R0),R2
LOD 2(R1),R3
#ifdef USE_PSTRS
TST 255,R2
#else
CMP 0,R2
#endif
BZ strcmp_end_loop
CMP R2,R3
BNZ strcmp_end_loop
LOD 3(R0),R2
LOD 3(R1),R3
#ifdef USE_PSTRS
TST 255,R2
#else
CMP 0,R2
#endif
BZ strcmp_end_loop
CMP R2,R3
BNZ strcmp_end_loop
303,6 → 379,9
 
CMP 0,R0
ADD.Z 1,R5
#ifndef SKIP_SHORT_CIRCUITS
BUSY.NZ
#endif
#else
LOD (R6),R2
MOV R4,R6
314,11 → 393,11
LDILO.Z 1,R0
 
ADD.NZ 1,R5
#ifndef SKIP_SHORT_CIRCUITS
BUSY.Z
#endif
#endif
 
#ifndef SKIP_SHORT_CIRCUITS
BUSY.NZ
#endif
CMP 3,R5
#ifndef SKIP_SHORT_CIRCUITS
BUSY.LT
343,9 → 422,6
BRA lcl_strcmp
CMP 0,R0
BGT func_2_final_then
#ifndef SKIP_SHORT_CIRCUITS
BUSY
#endif
CLR R0
BRA func_2_return_and_cleanup
func_2_final_then:
892,29 → 968,49
//}
 
some_string:
#ifdef USE_PSTRS
word 'DHRY','STON','E PR','OGRA','M, S','OME '
word 'STRI','NG\0\0'
#else
word 'D','H','R','Y','S','T','O','N','E',' '
word 'P','R','O','G','R','A','M',',',' '
word 'S','O','M','E',' ','S','T','R','I','N','G'
word 0
#endif
 
first_string:
#ifdef USE_PSTRS
word 'DHRY','STON','E PR','OGRA'
word 'M, 1','\'ST ','STRI','NG\0\0'
#else
word 'D','H','R','Y','S','T','O','N','E',' '
word 'P','R','O','G','R','A','M',','
word ' ','1','\'','S','T'
word ' ','S','T','R','I','N','G'
word 0
#endif
 
second_string:
#ifdef USE_PSTRS
word 'DHRY','STON','E PR','OGRA'
word 'M, 2','\'ND ','STRI','NG\0\0'
#else
word 'D','H','R','Y','S','T','O','N','E',' '
word 'P','R','O','G','R','A','M',',',' '
word '2','\'','N','D',' ','S','T','R','I','N','G'
word 0
#endif
 
third_string:
#ifdef USE_PSTRS
word 'DHRY','STON','E PR','OGRA'
word 'M, 3','\'RD ','STRI','NG\0\0'
#else
word 'D','H','R','Y','S','T','O','N','E',' '
word 'P','R','O','G','R','A','M',',',' '
word '3','\'','R','D',' ','S','T','R','I','N','G'
word 0
#endif
 
dhrystone:
#ifdef SUPERVISOR_TASK
/asm/Makefile
30,7 → 30,7
#
################################################################################
#
all: zipdhry.z testdiv.z wdt.z
all: zipdhry.z testdiv.z wdt.z halttest.z
ZASM := ../../sw/zasm/zasm
ZDMP := ../../sw/zasm/zdump
LIBS := ../../sw/lib
38,6 → 38,8
 
dump: zipdhry.txt testdiv.txt
 
halttest.z: halttest.S
$(ZASM) $(INCS) $^ -o $@
zipdhry.z: zipdhry.S $(LIBS)/divs.S $(LIBS)/divu.S stack.S
$(ZASM) $(INCS) $^ -o $@
zipdhry.txt: zipdhry.z
/cpp/zippy_tb.cpp
65,6 → 65,8
#define KEY_RETURN 10
#define CTRL(X) ((X)&0x01f)
 
#define MAXERR 10000
 
// No particular "parameters" need definition or redefinition here.
class ZIPPY_TB : public TESTB<Vzipsystem> {
public:
211,6 → 213,13
showval(ln, 0, "PIC ", m_core->v__DOT__pic_data, (m_cursor==0));
showval(ln,20, "WDT ", m_core->v__DOT__watchdog__DOT__r_value, (m_cursor==1));
// showval(ln,40, "CACH", m_core->v__DOT__manualcache__DOT__cache_base, (m_cursor==2));
 
if (!m_show_user_timers) {
showval(ln,40, "WBUS", m_core->v__DOT__watchbus__DOT__r_value, false);
} else {
showval(ln,40, "UBUS", m_core->v__DOT__r_wdbus_data, false);
}
 
showval(ln,60, "PIC2", m_core->v__DOT__ctri__DOT__r_int_state, (m_cursor==3));
 
ln++;
238,11 → 247,13
mvprintw(ln, 40, "%s %s",
(m_core->v__DOT__cpu_halt)? "CPU-HALT": " ",
(m_core->v__DOT__cpu_reset)?"CPU-RESET":" "); ln++;
mvprintw(ln, 40, "%s %s %s 0x%02x",
mvprintw(ln, 40, "%s %s %s 0x%02x %s %s",
(m_core->v__DOT__cmd_halt)? "HALT": " ",
(m_core->v__DOT__cmd_reset)?"RESET":" ",
(m_core->v__DOT__cmd_step)? "STEP" :" ",
(m_core->v__DOT__cmd_addr)&0x3f);
(m_core->v__DOT__cmd_addr)&0x3f,
(m_core->v__DOT__thecpu__DOT__master_ce)? "*CE*" :"(ce)",
(m_core->v__DOT__cpu_reset)? "*RST*" :"(rst)");
if (m_core->v__DOT__thecpu__DOT__gie)
attroff(A_BOLD);
else
389,7 → 400,12
(m_core->v__DOT__thecpu__DOT__master_ce),
(mem_pipe_stalled()),
(!m_core->v__DOT__thecpu__DOT__op_pipe),
(m_core->v__DOT__thecpu__DOT__mem_busy));
#ifdef OPT_PIPELINED_BUS_ACCESS
(m_core->v__DOT__thecpu__DOT__domem__DOT__cyc)
#else
(m_core->v__DOT__thecpu__DOT__mem_busy)
#endif
);
printw(" op_pipe = %d%d%d%d%d(%d|%d)",
(m_core->v__DOT__thecpu__DOT__dcdvalid),
(m_core->v__DOT__thecpu__DOT__opvalid_mem),
407,10 → 423,13
(m_core->v__DOT__thecpu__DOT__r_opI));
#endif
mvprintw(4,42,"0x%08x", m_core->v__DOT__thecpu__DOT__instruction);
printw(" A:%c%c B:%c",
#ifdef OPT_SINGLE_CYCLE
printw(" A:%c%c B:%c%c",
(m_core->v__DOT__thecpu__DOT__opA_alu)?'A':'-',
(m_core->v__DOT__thecpu__DOT__opA_mem)?'M':'-',
(m_core->v__DOT__thecpu__DOT__opB_alu)?'A':'-');
(m_core->v__DOT__thecpu__DOT__opB_alu)?'A':'-',
(m_core->v__DOT__thecpu__DOT__opB_mem)?'M':'-');
#endif
 
 
showins(ln, "I ",
460,6 → 479,14
alu_pc()); ln++;
if (m_core->v__DOT__thecpu__DOT__wr_reg_ce)
mvprintw(ln-1,10,"W");
else if (m_core->v__DOT__thecpu__DOT__alu_valid)
mvprintw(ln-1,10,(m_core->v__DOT__thecpu__DOT__alu_wr)?"w":"V");
else if (m_core->v__DOT__thecpu__DOT__mem_valid)
mvprintw(ln-1,10,"v");
else if (m_core->v__DOT__thecpu__DOT__r_alu_illegal)
mvprintw(ln-1,10,"I");
// else if (m_core->v__DOT__thecpu__DOT__alu_illegal_op)
// mvprintw(ln-1,10,"i");
 
mvprintw(ln-5, 65,"%s %s",
(m_core->v__DOT__thecpu__DOT__op_break)?"OB":" ",
506,13 → 533,35
}
 
unsigned int cmd_read(unsigned int a) {
int errcount = 0;
if (dbg_fp) {
dbg_flag= true;
fprintf(dbg_fp, "CMD-READ(%d)\n", a);
}
wb_write(CMD_REG, CMD_HALT|(a&0x3f));
while((wb_read(CMD_REG) & CMD_STALL) == 0)
;
while(((wb_read(CMD_REG) & CMD_STALL) == 0)&&(errcount<MAXERR))
errcount++;
if (errcount >= MAXERR) {
endwin();
 
printf("ERR: errcount >= MAXERR on wb_read(a=%x)\n", a);
printf("Clear-Pipeline = %d\n", m_core->v__DOT__thecpu__DOT__clear_pipeline);
printf("cpu-dbg-stall = %d\n", m_core->v__DOT__cpu_dbg_stall);
printf("pf_cyc = %d\n", m_core->v__DOT__thecpu__DOT__pf_cyc);
printf("mem_cyc_gbl = %d\n", m_core->v__DOT__thecpu__DOT__mem_cyc_gbl);
printf("mem_cyc_lcl = %d\n", m_core->v__DOT__thecpu__DOT__mem_cyc_lcl);
printf("opvalid = %d\n", m_core->v__DOT__thecpu__DOT__opvalid);
printf("dcdvalid = %d\n", m_core->v__DOT__thecpu__DOT__dcdvalid);
printf("dcd_ce = %d\n", m_core->v__DOT__thecpu__DOT__dcd_ce);
printf("dcd_stalled = %d\n", m_core->v__DOT__thecpu__DOT__dcd_stalled);
printf("pf_valid = %d\n", m_core->v__DOT__thecpu__DOT__pf_valid);
printf("dcd_early_branch=%d\n", m_core->v__DOT__thecpu__DOT__dcd_early_branch);
printf("dcd_early_branch=%d\n", m_core->v__DOT__thecpu__DOT__dcd_early_branch_stb);
 
exit(-2);
}
 
assert(errcount < MAXERR);
unsigned int v = wb_read(CMD_DATA);
 
if (dbg_flag)
523,11 → 572,13
}
 
void cmd_write(unsigned int a, int v) {
int errcount = 0;
if ((a&0x0f)==0x0f)
dbg_flag = true;
wb_write(CMD_REG, CMD_HALT|(a&0x3f));
while((wb_read(CMD_REG) & CMD_STALL) == 0)
;
while(((wb_read(CMD_REG) & CMD_STALL) == 0)&&(errcount < MAXERR))
errcount++;
assert(errcount < MAXERR);
if (dbg_flag)
fprintf(dbg_fp, "CMD-WRITE(%d) <= 0x%08x\n", a, v);
wb_write(CMD_DATA, v);
566,7 → 617,7
} ln++;
showval(ln, 0, "PIC ", cmd_read(32+ 0), (m_cursor==0));
showval(ln,20, "WDT ", cmd_read(32+ 1), (m_cursor==1));
// showval(ln,40, "CACH", cmd_read(32+ 2), (m_cursor==2));
showval(ln,40, "WBUS", cmd_read(32+ 2), false);
showval(ln,60, "PIC2", cmd_read(32+ 3), (m_cursor==3));
ln++;
showval(ln, 0, "TMRA", cmd_read(32+ 4), (m_cursor==4));
677,8 → 728,8
m_core->v__DOT__thecpu__DOT__pf_valid,
m_core->v__DOT__thecpu__DOT__gie,
0,
// m_core->v__DOT__thecpu__DOT__instruction_pc); ln++;
m_core->v__DOT__thecpu__DOT__pf_pc); ln++;
m_core->v__DOT__thecpu__DOT__instruction_pc); ln++;
// m_core->v__DOT__thecpu__DOT__pf_pc); ln++;
 
showins(ln, "Dc",
m_core->v__DOT__thecpu__DOT__dcd_ce,
845,11 → 896,38
m_core->v__DOT__thecpu__DOT__upc,
m_core->v__DOT__thecpu__DOT__pf_pc);
} if (dbg_fp) {
dbgins("Dc - ", m_core->v__DOT__thecpu__DOT__dcd_ce,
m_core->v__DOT__thecpu__DOT__dcdvalid,
m_core->v__DOT__thecpu__DOT__dcd_gie,
m_core->v__DOT__thecpu__DOT__dcd_stalled,
m_core->v__DOT__thecpu__DOT__dcd_pc-1);
dbgins("Op - ", m_core->v__DOT__thecpu__DOT__op_ce,
m_core->v__DOT__thecpu__DOT__opvalid,
m_core->v__DOT__thecpu__DOT__op_gie,
m_core->v__DOT__thecpu__DOT__op_stall,
op_pc());
/*
#ifdef OPT_SINGLE_CYCLE
fprintf(dbg_fp, "\t\t A = %08x, B = %08x, I = %08x, B+I = %08x, %c%c %s%s%s[%2x] = %08x %s\n",
m_core->v__DOT__thecpu__DOT__r_opA,
m_core->v__DOT__thecpu__DOT__r_opB,
m_core->v__DOT__thecpu__DOT__w_opBnI,
m_core->v__DOT__thecpu__DOT__r_dcdI,
(m_core->v__DOT__thecpu__DOT__opvalid_alu)?'A':'-',
(m_core->v__DOT__thecpu__DOT__opvalid_mem)?'M':'-',
(m_core->v__DOT__thecpu__DOT__wr_reg_ce)?"W":" ",
(m_core->v__DOT__thecpu__DOT__alu_wr)?"A":"M",
(m_core->v__DOT__thecpu__DOT__alu_ce)?"k":"-",
(m_core->v__DOT__thecpu__DOT__wr_reg_id),
(m_core->v__DOT__thecpu__DOT__wr_reg_vl),
(m_core->v__DOT__thecpu__DOT__mem_rdbusy)?"Mem-RdBusy":
((m_core->v__DOT__thecpu__DOT__domem__DOT__cyc)?"Mem-Busy":""));
fprintf(dbg_fp, "\t\topA = %08x, opB = %08x, alu_result = %08x\n",
m_core->v__DOT__thecpu__DOT__opA,
m_core->v__DOT__thecpu__DOT__opB,
m_core->v__DOT__thecpu__DOT__alu_result);
#endif
*/
dbgins("Al - ",
m_core->v__DOT__thecpu__DOT__alu_ce,
m_core->v__DOT__thecpu__DOT__alu_pc_valid,

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