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[/] [8051/] [trunk/] [rtl/] [verilog/] [oc8051_alu.v] - Diff between revs 133 and 139

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Line 44... Line 44... 
//////////////////////////////////////////////////////////////////////
 
//////////////////////////////////////////////////////////////////////
 
//
 
//
 
// CVS Revision History
 
// CVS Revision History
 
//
 
//
 
// $Log: not supported by cvs2svn $
 
// $Log: not supported by cvs2svn $
 
 
 
// Revision 1.13  2003/04/29 08:35:12  simont
 
 
 
// fix bug in substraction.
 
 
 
//
 
// Revision 1.12  2003/04/25 17:15:51  simont
 
// Revision 1.12  2003/04/25 17:15:51  simont
 
// change branch instruction execution (reduse needed clock periods).
 
// change branch instruction execution (reduse needed clock periods).
 
//
 
//
 
// Revision 1.11  2003/04/14 14:29:42  simont
 
// Revision 1.11  2003/04/14 14:29:42  simont
 
// fiz bug iv pcs operation.
 
// fiz bug iv pcs operation.
Line 66... Line 69... 
 
 
 
 
`include "oc8051_defines.v"
 
`include "oc8051_defines.v"
 
 
 
 
 
 
 
 
 
 
 
 
 
module oc8051_alu (clk, rst, op_code, src1, src2, src3, srcCy, srcAc, bit_in, des1, des2, desCy,
 
module oc8051_alu (clk, rst, op_code, src1, src2, src3, srcCy, srcAc, bit_in,
 
                   desAc, desOv);
 
                  des1, des2, des_acc, desCy, desAc, desOv);
 
//
 
//
 
// op_code      (in)  operation code [oc8051_decoder.alu_op -r]
 
// op_code      (in)  operation code [oc8051_decoder.alu_op -r]
 
// src1         (in)  first operand [oc8051_alu_src1_sel.des]
 
// src1         (in)  first operand [oc8051_alu_src1_sel.des]
 
// src2         (in)  second operand [oc8051_alu_src2_sel.des]
 
// src2         (in)  second operand [oc8051_alu_src2_sel.des]
 
// src3         (in)  third operand [oc8051_alu_src3_sel.des]
 
// src3         (in)  third operand [oc8051_alu_src3_sel.des]
Line 87... Line 90... 
 
 
 
 
input srcCy, srcAc, bit_in, clk, rst;
 
input srcCy, srcAc, bit_in, clk, rst;
 
input [3:0] op_code;
 
input [3:0] op_code;
 
input [7:0] src1, src2, src3;
 
input [7:0] src1, src2, src3;
 
output desCy, desAc, desOv;
 
output desCy, desAc, desOv;
 
output [7:0] des1, des2;
 
output [7:0] des1, des2, des_acc;
 
 
 
 
 
reg desCy, desAc, desOv;
 
reg desCy, desAc, desOv;
 
reg [7:0] des1, des2;
 
reg [7:0] des1, des2, des_acc;
 
 
 
 
 
 
 
 
 
//
 
//
 
//add
 
//add
 
//
 
//
Line 127... Line 130... 
//da
 
//da
 
//
 
//
 
reg da_tmp;
 
reg da_tmp;
 
//reg [8:0] da1;
 
//reg [8:0] da1;
 
 
 
 
 
 
 
//
 
 
 
// inc
 
 
 
//
 
 
 
wire [15:0] inc, dec;
 
 
 
 
 
oc8051_multiply oc8051_mul1(.clk(clk), .rst(rst), .enable(enable_mul), .src1(src1), .src2(src2), .des1(mulsrc1), .des2(mulsrc2), .desOv(mulOv));
 
oc8051_multiply oc8051_mul1(.clk(clk), .rst(rst), .enable(enable_mul), .src1(src1), .src2(src2), .des1(mulsrc1), .des2(mulsrc2), .desOv(mulOv));
 
oc8051_divide oc8051_div1(.clk(clk), .rst(rst), .enable(enable_div), .src1(src1), .src2(src2), .des1(divsrc1), .des2(divsrc2), .desOv(divOv));
 
oc8051_divide oc8051_div1(.clk(clk), .rst(rst), .enable(enable_div), .src1(src1), .src2(src2), .des1(divsrc1), .des2(divsrc2), .desOv(divOv));
 
 
 
 
 
/* Add */
 
/* Add */
 
assign add1 = {1'b0,src1[3:0]};
 
assign add1 = {1'b0,src1[3:0]};
Line 162... Line 170... 
assign sub9 = {1'b1,src1[7]};
 
assign sub9 = {1'b1,src1[7]};
 
assign suba = {1'b0,src2[7]};
 
assign suba = {1'b0,src2[7]};
 
assign subb = {1'b0,!sub8[3]};
 
assign subb = {1'b0,!sub8[3]};
 
assign subc = sub9-suba-subb;
 
assign subc = sub9-suba-subb;
 
 
 
 
 
 
 
/* inc */
 
always @(op_code or src1 or src2 or srcCy or srcAc or bit_in or src3 or mulsrc1 or mulsrc2 or mulOv or divsrc1 or divsrc2 or divOv or addc or add8 or add4 or sub4 or sub8 or subc or da_tmp)
 
assign inc = {src2, src1} + {15'h0, 1'b1};
 
 
 
assign dec = {src2, src1} - {15'h0, 1'b1};
 
 
 
 
 
 
 
always @(op_code or src1 or src2 or srcCy or srcAc or bit_in or src3 or mulsrc1
 
 
 
      or mulsrc2 or mulOv or divsrc1 or divsrc2 or divOv or addc or add8 or add4
 
 
 
      or sub4 or sub8 or subc or da_tmp or inc or dec)
 
begin
 
begin
 
 
 
 
 
  case (op_code)
 
  case (op_code)
 
//operation add
 
//operation add
 
    `OC8051_ALU_ADD: begin
 
    `OC8051_ALU_ADD: begin
 
      des1 = {addc[0],add8[2:0],add4[3:0]};
 
      des_acc = {addc[0],add8[2:0],add4[3:0]};
 
 
 
      des1 = src1;
 
      des2 = src3+ {7'b0, addc[1]};
 
      des2 = src3+ {7'b0, addc[1]};
 
      desCy = addc[1];
 
      desCy = addc[1];
 
      desAc = add4[4];
 
      desAc = add4[4];
 
      desOv = addc[1] ^ add8[3];
 
      desOv = addc[1] ^ add8[3];
 
 
 
 
 
      enable_mul = 1'b0;
 
      enable_mul = 1'b0;
 
      enable_div = 1'b0;
 
      enable_div = 1'b0;
 
    end
 
    end
 
//operation subtract
 
//operation subtract
 
    `OC8051_ALU_SUB: begin
 
    `OC8051_ALU_SUB: begin
 
      des1 = {subc[0],sub8[2:0],sub4[3:0]};
 
      des_acc = {subc[0],sub8[2:0],sub4[3:0]};
 
 
 
      des1 = src1;
 
      des2 = 8'h00;
 
      des2 = 8'h00;
 
      desCy = !subc[1];
 
      desCy = !subc[1];
 
      desAc = !sub4[4];
 
      desAc = !sub4[4];
 
      desOv = !subc[1] ^ !sub8[3];
 
      desOv = !subc[1] ^ !sub8[3];
 
 
 
 
 
      enable_mul = 1'b0;
 
      enable_mul = 1'b0;
 
      enable_div = 1'b0;
 
      enable_div = 1'b0;
 
    end
 
    end
 
//operation multiply
 
//operation multiply
 
    `OC8051_ALU_MUL: begin
 
    `OC8051_ALU_MUL: begin
 
      des1 = mulsrc1;
 
      des_acc = mulsrc1;
 
 
 
      des1 = src1;
 
      des2 = mulsrc2;
 
      des2 = mulsrc2;
 
      desOv = mulOv;
 
      desOv = mulOv;
 
      desCy = 1'b0;
 
      desCy = 1'b0;
 
      desAc = 1'bx;
 
      desAc = 1'bx;
 
      enable_mul = 1'b1;
 
      enable_mul = 1'b1;
 
      enable_div = 1'b0;
 
      enable_div = 1'b0;
 
    end
 
    end
 
//operation divide
 
//operation divide
 
    `OC8051_ALU_DIV: begin
 
    `OC8051_ALU_DIV: begin
 
      des1 = divsrc1;
 
      des_acc = divsrc1;
 
 
 
      des1 = src1;
 
      des2 = divsrc2;
 
      des2 = divsrc2;
 
      desOv = divOv;
 
      desOv = divOv;
 
      desAc = 1'bx;
 
      desAc = 1'bx;
 
      desCy = 1'b0;
 
      desCy = 1'b0;
 
      enable_mul = 1'b0;
 
      enable_mul = 1'b0;
 
      enable_div = 1'b1;
 
      enable_div = 1'b1;
 
    end
 
    end
 
//operation decimal adjustment
 
//operation decimal adjustment
 
    `OC8051_ALU_DA: begin
 
    `OC8051_ALU_DA: begin
 
 
 
 
 
      if (srcAc==1'b1 | src1[3:0]>4'b1001) {da_tmp, des1[3:0]} = {1'b0, src1[3:0]}+ 5'b00110;
 
      if (srcAc==1'b1 | src1[3:0]>4'b1001) {da_tmp, des_acc[3:0]} = {1'b0, src1[3:0]}+ 5'b00110;
 
      else {da_tmp, des1[3:0]} = {1'b0, src1[3:0]};
 
      else {da_tmp, des_acc[3:0]} = {1'b0, src1[3:0]};
 
 
 
 
 
      if (srcCy==1'b1 | src1[7:4]>4'b1001)
 
      if (srcCy==1'b1 | src1[7:4]>4'b1001)
 
        {desCy, des1[7:4]} = {srcCy, src1[7:4]}+ 5'b00110 + {4'b0, da_tmp};
 
        {desCy, des_acc[7:4]} = {srcCy, src1[7:4]}+ 5'b00110 + {4'b0, da_tmp};
 
      else {desCy, des1[7:4]} = {srcCy, src1[7:4]} + {4'b0, da_tmp};
 
      else {desCy, des_acc[7:4]} = {srcCy, src1[7:4]} + {4'b0, da_tmp};
 
 
 
 
 
 
 
      des1 = src1;
 
 
 
 
 
      des2 = 8'h00;
 
      des2 = 8'h00;
 
      desAc = 1'b0;
 
      desAc = 1'b0;
 
      desOv = 1'b0;
 
      desOv = 1'b0;
 
      enable_mul = 1'b0;
 
      enable_mul = 1'b0;
 
      enable_div = 1'b0;
 
      enable_div = 1'b0;
 
    end
 
    end
 
//operation not
 
//operation not
 
// bit operation not
 
// bit operation not
 
    `OC8051_ALU_NOT: begin
 
    `OC8051_ALU_NOT: begin
 
 
 
      des_acc = ~src1;
 
      des1 = ~src1;
 
      des1 = ~src1;
 
      des2 = 8'h00;
 
      des2 = 8'h00;
 
      desCy = !srcCy;
 
      desCy = !srcCy;
 
      desAc = 1'bx;
 
      desAc = 1'bx;
 
      desOv = 1'bx;
 
      desOv = 1'bx;
Line 239... Line 259... 
      enable_div = 1'b0;
 
      enable_div = 1'b0;
 
    end
 
    end
 
//operation and
 
//operation and
 
//bit operation and
 
//bit operation and
 
    `OC8051_ALU_AND: begin
 
    `OC8051_ALU_AND: begin
 
 
 
      des_acc = src1 & src2;
 
      des1 = src1 & src2;
 
      des1 = src1 & src2;
 
      des2 = 8'h00;
 
      des2 = 8'h00;
 
      desCy = srcCy & bit_in;
 
      desCy = srcCy & bit_in;
 
      desAc = 1'bx;
 
      desAc = 1'bx;
 
      desOv = 1'bx;
 
      desOv = 1'bx;
Line 250... Line 271... 
      enable_div = 1'b0;
 
      enable_div = 1'b0;
 
    end
 
    end
 
//operation xor
 
//operation xor
 
// bit operation xor
 
// bit operation xor
 
    `OC8051_ALU_XOR: begin
 
    `OC8051_ALU_XOR: begin
 
 
 
      des_acc = src1 ^ src2;
 
      des1 = src1 ^ src2;
 
      des1 = src1 ^ src2;
 
      des2 = 8'h00;
 
      des2 = 8'h00;
 
      desCy = srcCy ^ bit_in;
 
      desCy = srcCy ^ bit_in;
 
      desAc = 1'bx;
 
      desAc = 1'bx;
 
      desOv = 1'bx;
 
      desOv = 1'bx;
Line 261... Line 283... 
      enable_div = 1'b0;
 
      enable_div = 1'b0;
 
    end
 
    end
 
//operation or
 
//operation or
 
// bit operation or
 
// bit operation or
 
    `OC8051_ALU_OR: begin
 
    `OC8051_ALU_OR: begin
 
 
 
      des_acc = src1 | src2;
 
      des1 = src1 | src2;
 
      des1 = src1 | src2;
 
      des2 = 8'h00;
 
      des2 = 8'h00;
 
      desCy = srcCy | bit_in;
 
      desCy = srcCy | bit_in;
 
      desAc = 1'bx;
 
      desAc = 1'bx;
 
      desOv = 1'bx;
 
      desOv = 1'bx;
Line 272... Line 295... 
      enable_div = 1'b0;
 
      enable_div = 1'b0;
 
    end
 
    end
 
//operation rotate left
 
//operation rotate left
 
// bit operation cy= cy or (not ram)
 
// bit operation cy= cy or (not ram)
 
    `OC8051_ALU_RL: begin
 
    `OC8051_ALU_RL: begin
 
      des1 = {src1[6:0], src1[7]};
 
      des_acc = {src1[6:0], src1[7]};
 
 
 
      des1 = src1 ;
 
      des2 = 8'h00;
 
      des2 = 8'h00;
 
      desCy = srcCy | !bit_in;
 
      desCy = srcCy | !bit_in;
 
      desAc = 1'bx;
 
      desAc = 1'bx;
 
      desOv = 1'bx;
 
      desOv = 1'bx;
 
      enable_mul = 1'b0;
 
      enable_mul = 1'b0;
 
      enable_div = 1'b0;
 
      enable_div = 1'b0;
 
    end
 
    end
 
//operation rotate left with carry and swap nibbles
 
//operation rotate left with carry and swap nibbles
 
    `OC8051_ALU_RLC: begin
 
    `OC8051_ALU_RLC: begin
 
      des1 = {src1[6:0], srcCy};
 
      des_acc = {src1[6:0], srcCy};
 
 
 
      des1 = src1 ;
 
      des2 = {src1[3:0], src1[7:4]};
 
      des2 = {src1[3:0], src1[7:4]};
 
      desCy = src1[7];
 
      desCy = src1[7];
 
      desAc = 1'b0;
 
      desAc = 1'b0;
 
      desOv = 1'b0;
 
      desOv = 1'b0;
 
      enable_mul = 1'b0;
 
      enable_mul = 1'b0;
 
      enable_div = 1'b0;
 
      enable_div = 1'b0;
 
    end
 
    end
 
//operation rotate right
 
//operation rotate right
 
    `OC8051_ALU_RR: begin
 
    `OC8051_ALU_RR: begin
 
      des1 = {src1[0], src1[7:1]};
 
      des_acc = {src1[0], src1[7:1]};
 
 
 
      des1 = src1 ;
 
      des2 = 8'h00;
 
      des2 = 8'h00;
 
      desCy = srcCy & !bit_in;
 
      desCy = srcCy & !bit_in;
 
      desAc = 1'b0;
 
      desAc = 1'b0;
 
      desOv = 1'b0;
 
      desOv = 1'b0;
 
      enable_mul = 1'b0;
 
      enable_mul = 1'b0;
 
      enable_div = 1'b0;
 
      enable_div = 1'b0;
 
    end
 
    end
 
//operation rotate right with carry
 
//operation rotate right with carry
 
    `OC8051_ALU_RRC: begin
 
    `OC8051_ALU_RRC: begin
 
      des1 = {srcCy, src1[7:1]};
 
      des_acc = {srcCy, src1[7:1]};
 
 
 
      des1 = src1 ;
 
      des2 = 8'h00;
 
      des2 = 8'h00;
 
      desCy = src1[0];
 
      desCy = src1[0];
 
      desAc = 1'b0;
 
      desAc = 1'b0;
 
      desOv = 1'b0;
 
      desOv = 1'b0;
 
      enable_mul = 1'b0;
 
      enable_mul = 1'b0;
 
      enable_div = 1'b0;
 
      enable_div = 1'b0;
 
    end
 
    end
 
//operation pcs Add
 
//operation pcs Add
 
/*    `OC8051_ALU_PCS: begin
 
    `OC8051_ALU_INC: begin
 
      if (src1[7]) begin
 
      if (srcCy) begin
 
        {desCy, des1} = {1'b0, src2} + {1'b0, src1};
 
        des_acc = dec[7:0];
 
        des2 = {1'b0, src3} - {8'h0, !desCy};
 
        des1 = dec[7:0];
 
      end else {des2, des1} = {src3,src2} + {8'h00, src1};
 
        des2 = dec[15:8];
 
      desCy = 1'b0;
 
      end else begin
 
      desAc = 1'b0;
 
        des_acc = inc[7:0];
 
      desOv = 1'b0;
 
        des1 = inc[7:0];
 
      enable_mul = 1'b0;
 
        des2 = inc[15:8];
 
      enable_div = 1'b0;
 
      end
 
    end*/
 
      desCy = 1'b0;
 
 
 
      desAc = 1'b0;
 
 
 
      desOv = 1'b0;
 
 
 
      enable_mul = 1'b0;
 
 
 
      enable_div = 1'b0;
 
 
 
    end
 
//operation exchange
 
//operation exchange
 
//if carry = 0 exchange low order digit
 
//if carry = 0 exchange low order digit
 
    `OC8051_ALU_XCH: begin
 
    `OC8051_ALU_XCH: begin
 
      if (srcCy)
 
      if (srcCy)
 
      begin
 
      begin
 
 
 
        des_acc = src2;
 
        des1 = src2;
 
        des1 = src2;
 
        des2 = src1;
 
        des2 = src1;
 
      end else begin
 
      end else begin
 
 
 
        des_acc = {src1[7:4],src2[3:0]};
 
        des1 = {src1[7:4],src2[3:0]};
 
        des1 = {src1[7:4],src2[3:0]};
 
        des2 = {src2[7:4],src1[3:0]};
 
        des2 = {src2[7:4],src1[3:0]};
 
      end
 
      end
 
      desCy = 1'b0;
 
      desCy = 1'b0;
 
      desAc = 1'b0;
 
      desAc = 1'b0;
 
      desOv = 1'b0;
 
      desOv = 1'b0;
 
      enable_mul = 1'b0;
 
      enable_mul = 1'b0;
 
      enable_div = 1'b0;
 
      enable_div = 1'b0;
 
    end
 
    end
 
    default: begin
 
    default: begin
 
 
 
      des_acc = src1;
 
      des1 = src1;
 
      des1 = src1;
 
      des2 = src2;
 
      des2 = src2;
 
      desCy = srcCy;
 
      desCy = srcCy;
 
      desAc = srcAc;
 
      desAc = srcAc;
 
      desOv = 1'b0;
 
      desOv = 1'b0;

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