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//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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//
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//
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// CVS Revision History
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// CVS Revision History
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//
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//
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// $Log: not supported by cvs2svn $
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// $Log: not supported by cvs2svn $
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// Revision 1.15 2003/05/07 12:31:53 simont
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// add wire sub_result, conect it to des_acc and des1.
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//
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// Revision 1.14 2003/05/05 15:46:36 simont
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// Revision 1.14 2003/05/05 15:46:36 simont
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// add aditional alu destination to solve critical path.
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// add aditional alu destination to solve critical path.
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//
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//
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// Revision 1.13 2003/04/29 08:35:12 simont
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// Revision 1.13 2003/04/29 08:35:12 simont
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// fix bug in substraction.
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// fix bug in substraction.
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`include "oc8051_defines.v"
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`include "oc8051_defines.v"
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module oc8051_alu (clk, rst, op_code, src1, src2, src3, srcCy, srcAc, bit_in,
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module oc8051_alu (clk, rst, op_code, src1, src2, src3, srcCy, srcAc, bit_in,
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des1, des2, des_acc, desCy, desAc, desOv);
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des1, des2, des_acc, desCy, desAc, desOv, sub_result);
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//
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//
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// op_code (in) operation code [oc8051_decoder.alu_op -r]
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// op_code (in) operation code [oc8051_decoder.alu_op -r]
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// src1 (in) first operand [oc8051_alu_src1_sel.des]
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// src1 (in) first operand [oc8051_alu_src1_sel.des]
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// src2 (in) second operand [oc8051_alu_src2_sel.des]
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// src2 (in) second operand [oc8051_alu_src2_sel.des]
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// src3 (in) third operand [oc8051_alu_src3_sel.des]
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// src3 (in) third operand [oc8051_alu_src3_sel.des]
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input srcCy, srcAc, bit_in, clk, rst;
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input srcCy, srcAc, bit_in, clk, rst;
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input [3:0] op_code;
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input [3:0] op_code;
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input [7:0] src1, src2, src3;
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input [7:0] src1, src2, src3;
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output desCy, desAc, desOv;
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output desCy, desAc, desOv;
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output [7:0] des1, des2, des_acc;
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output [7:0] des1, des2, des_acc, sub_result;
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reg desCy, desAc, desOv;
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reg desCy, desAc, desOv;
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reg [7:0] des1, des2, des_acc;
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reg [7:0] des1, des2, des_acc;
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enable_div = 1'b0;
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enable_div = 1'b0;
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end
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end
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//operation subtract
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//operation subtract
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`OC8051_ALU_SUB: begin
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`OC8051_ALU_SUB: begin
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des_acc = sub_result;
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des_acc = sub_result;
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des1 = sub_result;
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// des1 = sub_result;
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des1 = 8'h00;
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des2 = 8'h00;
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des2 = 8'h00;
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desCy = !subc[1];
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desCy = !subc[1];
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desAc = !sub4[4];
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desAc = !sub4[4];
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desOv = !subc[1] ^ !sub8[3];
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desOv = !subc[1] ^ !sub8[3];
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