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[/] [open8_urisc/] [trunk/] [VHDL/] [adc128s022.vhd] - Diff between revs 317 and 319

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Rev 317 Rev 319
Line 146... Line 146...
          Conv_Start         <= '1';
          Conv_Start         <= '1';
          ADC_State          <= SP_WAIT;
          ADC_State          <= SP_WAIT;
 
 
        when SP_WAIT =>
        when SP_WAIT =>
          if( Valid = '1' )then
          if( Valid = '1' )then
            RAW_Channel      <= Channel;
            RAW_Channel      <= Channel - 1;
            RAW_Data         <= "0000" & Data_Out;
            RAW_Data         <= "0000" & Data_Out;
            RAW_Valid        <= '1';
            RAW_Valid        <= '1';
            ADC_State        <= INC_CH;
            ADC_State        <= INC_CH;
          end if;
          end if;
 
 

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