URL
https://opencores.org/ocsvn/open8_urisc/open8_urisc/trunk
[/] [open8_urisc/] [trunk/] [VHDL/] [adc128s022.vhd] - Diff between revs 317 and 319
Go to most recent revision |
Show entire file |
Details |
Blame |
View Log
Rev 317 |
Rev 319 |
Line 146... |
Line 146... |
Conv_Start <= '1';
|
Conv_Start <= '1';
|
ADC_State <= SP_WAIT;
|
ADC_State <= SP_WAIT;
|
|
|
when SP_WAIT =>
|
when SP_WAIT =>
|
if( Valid = '1' )then
|
if( Valid = '1' )then
|
RAW_Channel <= Channel;
|
RAW_Channel <= Channel - 1;
|
RAW_Data <= "0000" & Data_Out;
|
RAW_Data <= "0000" & Data_Out;
|
RAW_Valid <= '1';
|
RAW_Valid <= '1';
|
ADC_State <= INC_CH;
|
ADC_State <= INC_CH;
|
end if;
|
end if;
|
|
|
© copyright 1999-2024
OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.