URL
https://opencores.org/ocsvn/openmsp430/openmsp430/trunk
[/] [openmsp430/] [trunk/] [core/] [sim/] [rtl_sim/] [src/] [clock_module_asic_smclk.v] - Diff between revs 134 and 180
Go to most recent revision |
Show entire file |
Details |
Blame |
View Log
Rev 134 |
Rev 180 |
Line 57... |
Line 57... |
$display("| START SIMULATION |");
|
$display("| START SIMULATION |");
|
$display(" ===============================================");
|
$display(" ===============================================");
|
repeat(5) @(posedge smclk);
|
repeat(5) @(posedge smclk);
|
stimulus_done = 0;
|
stimulus_done = 0;
|
|
|
`ifdef ASIC
|
`ifdef ASIC_CLOCKING
|
|
|
//--------------------------------------------------------
|
//--------------------------------------------------------
|
// SMCLK GENERATION - LFXT_CLK INPUT
|
// SMCLK GENERATION - LFXT_CLK INPUT
|
//--------------------------------------------------------
|
//--------------------------------------------------------
|
|
|
© copyright 1999-2024
OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.