URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [orpsocv2/] [boards/] [actel/] [ordb1a3pe1500/] [sim/] [bin/] [Makefile] - Diff between revs 411 and 449

Rev 411	Rev 449
Line 537...	Line 537...
`clean-sim-test-sw:`	`clean-sim-test-sw:`
`$(Q)if [ -e $(SIM_SW_IMAGE) ]; then unlink $(SIM_SW_IMAGE); fi`	`$(Q)if [ -e $(SIM_SW_IMAGE) ]; then unlink $(SIM_SW_IMAGE); fi`

`clean-sw:`	`clean-sw:`
`$(Q) echo; echo "\t### Cleaning simulation sw directories ###"; echo;`	`$(Q) echo; echo "\t### Cleaning simulation sw directories ###"; echo;`
`$(Q) $(MAKE) -C $(COMMON_SW_DIR)/lib clean-all`	`$(Q) $(MAKE) -C $(COMMON_SW_DIR)/lib distclean`

`clean-rtl:`	`clean-rtl:`
`$(Q) echo; echo "\t### Cleaning generated verilog RTL ###"; echo;`	`$(Q) echo; echo "\t### Cleaning generated verilog RTL ###"; echo;`
`for module in $(RTL_TO_CHECK); do \`	`for module in $(RTL_TO_CHECK); do \`
`$(MAKE) -C $(RTL_VERILOG_DIR)/$$module clean; \`	`$(MAKE) -C $(RTL_VERILOG_DIR)/$$module clean; \`