URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [orpsocv2/] [rtl/] [verilog/] [uart16550/] [uart_receiver.v] - Diff between revs 360 and 363

Rev 360	Rev 363
Line 255...	Line 255...

`wire rcounter16_eq_7 = (rcounter16 == 4'd7);`	`wire rcounter16_eq_7 = (rcounter16 == 4'd7);`
`wire rcounter16_eq_0 = (rcounter16 == 4'd0);`	`wire rcounter16_eq_0 = (rcounter16 == 4'd0);`
`wire rcounter16_eq_1 = (rcounter16 == 4'd1);`	`wire rcounter16_eq_1 = (rcounter16 == 4'd1);`

`wire [3:0] rcounter16_minus_1 = rcounter16 - 1'b1;`	`wire [3:0] rcounter16_minus_1 = rcounter16 - 3'd1;`

`parameter sr_idle = 4'd0;`	`parameter sr_idle = 4'd0;`
`parameter sr_rec_start = 4'd1;`	`parameter sr_rec_start = 4'd1;`
`parameter sr_rec_bit = 4'd2;`	`parameter sr_rec_bit = 4'd2;`
`parameter sr_rec_parity = 4'd3;`	`parameter sr_rec_parity = 4'd3;`
Line 349...	Line 349...
`rparity_error <= 1'b0; // no parity - no error :)`	`rparity_error <= 1'b0; // no parity - no error :)`
`end`	`end`
`else // else we have more bits to read`	`else // else we have more bits to read`
`begin`	`begin`
`rstate <= sr_rec_bit;`	`rstate <= sr_rec_bit;`
`rbit_counter <= rbit_counter - 1'b1;`	`rbit_counter <= rbit_counter - 3'd1;`
`end`	`end`
`rcounter16 <= 4'b1110;`	`rcounter16 <= 4'b1110;`
`end`	`end`
`sr_rec_parity: begin`	`sr_rec_parity: begin`
`if (rcounter16_eq_7) // read the parity`	`if (rcounter16_eq_7) // read the parity`