URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [orpsocv2/] [sw/] [drivers/] [i2c_master_slave/] [include/] [i2c_master_slave.h] - Diff between revs 403 and 486

Rev 403	Rev 486
Line 8...	Line 8...
`************************************************************/`	`************************************************************/`

`#ifndef _I2C_MASTER_SLAVE_H_`	`#ifndef _I2C_MASTER_SLAVE_H_`
`#define _I2C_MASTER_SLAVE_H_`	`#define _I2C_MASTER_SLAVE_H_`

`extern const int i2c_base_adr[4];`
`//Memory mapping adresses`	`//Memory mapping adresses`

`#define I2C_MASTER_SLAVE_PRERlo 0x0 // Clock prescaler register`	`#define I2C_MASTER_SLAVE_PRERlo 0x0 // Clock prescaler register`
`#define I2C_MASTER_SLAVE_PRERhi 0x1 // Clock prescaler register`	`#define I2C_MASTER_SLAVE_PRERhi 0x1 // Clock prescaler register`
`#define I2C_MASTER_SLAVE_CTR 0x2 // Control register`	`#define I2C_MASTER_SLAVE_CTR 0x2 // Control register`