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#set_property -dict { PACKAGE_PIN A20 IOSTANDARD TMDS_33 } [get_ports { hdmi_out_data_n[2] }]; #IO_L2N_T0_AD8N_35 Sch=hdmi_tx_n[2]
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#set_property -dict { PACKAGE_PIN A20 IOSTANDARD TMDS_33 } [get_ports { hdmi_out_data_n[2] }]; #IO_L2N_T0_AD8N_35 Sch=hdmi_tx_n[2]
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#set_property -dict { PACKAGE_PIN B19 IOSTANDARD TMDS_33 } [get_ports { hdmi_out_data_p[2] }]; #IO_L2P_T0_AD8P_35 Sch=hdmi_tx_p[2]
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#set_property -dict { PACKAGE_PIN B19 IOSTANDARD TMDS_33 } [get_ports { hdmi_out_data_p[2] }]; #IO_L2P_T0_AD8P_35 Sch=hdmi_tx_p[2]
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#set_property -dict { PACKAGE_PIN E18 IOSTANDARD LVCMOS33 } [get_ports { hdmi_out_hpd }]; #IO_L5P_T0_AD9P_35 Sch=hdmi_tx_hpd
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#set_property -dict { PACKAGE_PIN E18 IOSTANDARD LVCMOS33 } [get_ports { hdmi_out_hpd }]; #IO_L5P_T0_AD9P_35 Sch=hdmi_tx_hpd
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# NET "TMDS_Clk_p" LOC = "H16"; # Clock p
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# NET "TMDS_Clk_n" LOC = "H17"; # Clock n
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# NET "TMDS_Data_p[2]" LOC = "B19"; #
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# NET "TMDS_Data_n[2]" LOC = "A20"; # Red
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# NET "TMDS_Data_p[1]" LOC = "C20"; #
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# NET "TMDS_Data_n[1]" LOC = "B20"; # Green
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# NET "TMDS_Data_p[0]" LOC = "D19"; #
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# NET "TMDS_Data_n[0]" LOC = "D20"; # Blue
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# NET "TMDS_Clk_p" IOSTANDARD = TMDS_33;
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# NET "TMDS_Clk_n" IOSTANDARD = TMDS_33;
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# NET "TMDS_Data_p[2]" IOSTANDARD = TMDS_33;
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# NET "TMDS_Data_n[2]" IOSTANDARD = TMDS_33;
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# NET "TMDS_Data_p[1]" IOSTANDARD = TMDS_33;
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# NET "TMDS_Data_n[1]" IOSTANDARD = TMDS_33;
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# NET "TMDS_Data_p[0]" IOSTANDARD = TMDS_33;
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# NET "TMDS_Data_n[0]" IOSTANDARD = TMDS_33;
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#HDMI TX CEC
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#HDMI TX CEC
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#set_property -dict { PACKAGE_PIN E19 IOSTANDARD LVCMOS33 } [get_ports { hdmi_tx_cec }]; #IO_L5N_T0_AD9N_35 Sch=hdmi_tx_cec
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#set_property -dict { PACKAGE_PIN E19 IOSTANDARD LVCMOS33 } [get_ports { hdmi_tx_cec }]; #IO_L5N_T0_AD9N_35 Sch=hdmi_tx_cec
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#set_property -dict { PACKAGE_PIN U14 IOSTANDARD LVCMOS33 } [get_ports { jd[4] }]; #IO_L11P_T1_SRCC_34 Sch=jd_p[3]
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#set_property -dict { PACKAGE_PIN U14 IOSTANDARD LVCMOS33 } [get_ports { jd[4] }]; #IO_L11P_T1_SRCC_34 Sch=jd_p[3]
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#set_property -dict { PACKAGE_PIN U15 IOSTANDARD LVCMOS33 } [get_ports { jd[5] }]; #IO_L11N_T1_SRCC_34 Sch=jd_n[3]
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#set_property -dict { PACKAGE_PIN U15 IOSTANDARD LVCMOS33 } [get_ports { jd[5] }]; #IO_L11N_T1_SRCC_34 Sch=jd_n[3]
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#set_property -dict { PACKAGE_PIN V17 IOSTANDARD LVCMOS33 } [get_ports { jd[6] }]; #IO_L21P_T3_DQS_34 Sch=jd_p[4]
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#set_property -dict { PACKAGE_PIN V17 IOSTANDARD LVCMOS33 } [get_ports { jd[6] }]; #IO_L21P_T3_DQS_34 Sch=jd_p[4]
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#set_property -dict { PACKAGE_PIN V18 IOSTANDARD LVCMOS33 } [get_ports { jd[7] }]; #IO_L21N_T3_DQS_34 Sch=jd_n[4]
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#set_property -dict { PACKAGE_PIN V18 IOSTANDARD LVCMOS33 } [get_ports { jd[7] }]; #IO_L21N_T3_DQS_34 Sch=jd_n[4]
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# Temp VGA output (the raw output from VDU8)
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NET "red" LOC = "T14";
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NET "red" IOSTANDARD = LVCMOS33;
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NET "green" LOC = "T15";
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NET "green" IOSTANDARD = LVCMOS33;
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NET "blue" LOC = "P14";
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NET "blue" IOSTANDARD = LVCMOS33;
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NET "hsync" LOC = "R14";
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NET "hsync" IOSTANDARD = LVCMOS33;
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NET "vsync" LOC = "U14";
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NET "vsync" IOSTANDARD = LVCMOS33;
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NET "blank" LOC = "U15";
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NET "blank" IOSTANDARD = LVCMOS33;
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##Pmod Header JE
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##Pmod Header JE
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#set_property -dict { PACKAGE_PIN V12 IOSTANDARD LVCMOS33 } [get_ports { je[0] }]; #IO_L4P_T0_34 Sch=je[1]
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#set_property -dict { PACKAGE_PIN V12 IOSTANDARD LVCMOS33 } [get_ports { je[0] }]; #IO_L4P_T0_34 Sch=je[1]
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#set_property -dict { PACKAGE_PIN W16 IOSTANDARD LVCMOS33 } [get_ports { je[1] }]; #IO_L18N_T2_34 Sch=je[2]
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#set_property -dict { PACKAGE_PIN W16 IOSTANDARD LVCMOS33 } [get_ports { je[1] }]; #IO_L18N_T2_34 Sch=je[2]
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#set_property -dict { PACKAGE_PIN J15 IOSTANDARD LVCMOS33 } [get_ports { je[2] }]; #IO_25_35 Sch=je[3]
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#set_property -dict { PACKAGE_PIN J15 IOSTANDARD LVCMOS33 } [get_ports { je[2] }]; #IO_25_35 Sch=je[3]
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