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[/] [System09/] [trunk/] [rtl/] [System09_Digilent_ZyboZ20/] [system09.ucf] - Diff between revs 200 and 202

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Rev 200 Rev 202
Line 177... Line 177...
#set_property -dict { PACKAGE_PIN Y7    IOSTANDARD LVCMOS33     } [get_ports { jb[4] }]; #IO_L13P_T2_MRCC_13 Sch=jb_p[3]
#set_property -dict { PACKAGE_PIN Y7    IOSTANDARD LVCMOS33     } [get_ports { jb[4] }]; #IO_L13P_T2_MRCC_13 Sch=jb_p[3]
#set_property -dict { PACKAGE_PIN Y6    IOSTANDARD LVCMOS33     } [get_ports { jb[5] }]; #IO_L13N_T2_MRCC_13 Sch=jb_n[3]
#set_property -dict { PACKAGE_PIN Y6    IOSTANDARD LVCMOS33     } [get_ports { jb[5] }]; #IO_L13N_T2_MRCC_13 Sch=jb_n[3]
#set_property -dict { PACKAGE_PIN V6    IOSTANDARD LVCMOS33     } [get_ports { jb[6] }]; #IO_L22P_T3_13 Sch=jb_p[4]
#set_property -dict { PACKAGE_PIN V6    IOSTANDARD LVCMOS33     } [get_ports { jb[6] }]; #IO_L22P_T3_13 Sch=jb_p[4]
#set_property -dict { PACKAGE_PIN W6    IOSTANDARD LVCMOS33     } [get_ports { jb[7] }]; #IO_L22N_T3_13 Sch=jb_n[4]
#set_property -dict { PACKAGE_PIN W6    IOSTANDARD LVCMOS33     } [get_ports { jb[7] }]; #IO_L22N_T3_13 Sch=jb_n[4]
 
 
 
 
##Pmod Header JC
##Pmod Header JC
#set_property -dict { PACKAGE_PIN V15   IOSTANDARD LVCMOS33     } [get_ports { jc[0] }]; #IO_L10P_T1_34 Sch=jc_p[1]
#set_property -dict { PACKAGE_PIN V15   IOSTANDARD LVCMOS33     } [get_ports { jc[0] }]; #IO_L10P_T1_34 Sch=jc_p[1]
#set_property -dict { PACKAGE_PIN W15   IOSTANDARD LVCMOS33     } [get_ports { jc[1] }]; #IO_L10N_T1_34 Sch=jc_n[1]
#set_property -dict { PACKAGE_PIN W15   IOSTANDARD LVCMOS33     } [get_ports { jc[1] }]; #IO_L10N_T1_34 Sch=jc_n[1]
#set_property -dict { PACKAGE_PIN T11   IOSTANDARD LVCMOS33     } [get_ports { jc[2] }]; #IO_L1P_T0_34 Sch=jc_p[2]
#set_property -dict { PACKAGE_PIN T11   IOSTANDARD LVCMOS33     } [get_ports { jc[2] }]; #IO_L1P_T0_34 Sch=jc_p[2]
#set_property -dict { PACKAGE_PIN T10   IOSTANDARD LVCMOS33     } [get_ports { jc[3] }]; #IO_L1N_T0_34 Sch=jc_n[2]
#set_property -dict { PACKAGE_PIN T10   IOSTANDARD LVCMOS33     } [get_ports { jc[3] }]; #IO_L1N_T0_34 Sch=jc_n[2]
#set_property -dict { PACKAGE_PIN W14   IOSTANDARD LVCMOS33     } [get_ports { jc[4] }]; #IO_L8P_T1_34 Sch=jc_p[3]
#set_property -dict { PACKAGE_PIN W14   IOSTANDARD LVCMOS33     } [get_ports { jc[4] }]; #IO_L8P_T1_34 Sch=jc_p[3]
#set_property -dict { PACKAGE_PIN Y14   IOSTANDARD LVCMOS33     } [get_ports { jc[5] }]; #IO_L8N_T1_34 Sch=jc_n[3]
#set_property -dict { PACKAGE_PIN Y14   IOSTANDARD LVCMOS33     } [get_ports { jc[5] }]; #IO_L8N_T1_34 Sch=jc_n[3]
#set_property -dict { PACKAGE_PIN T12   IOSTANDARD LVCMOS33     } [get_ports { jc[6] }]; #IO_L2P_T0_34 Sch=jc_p[4]
#set_property -dict { PACKAGE_PIN T12   IOSTANDARD LVCMOS33     } [get_ports { jc[6] }]; #IO_L2P_T0_34 Sch=jc_p[4]
#set_property -dict { PACKAGE_PIN U12   IOSTANDARD LVCMOS33     } [get_ports { jc[7] }]; #IO_L2N_T0_34 Sch=jc_n[4]
#set_property -dict { PACKAGE_PIN U12   IOSTANDARD LVCMOS33     } [get_ports { jc[7] }]; #IO_L2N_T0_34 Sch=jc_n[4]
 
# PmodVGA Connector J1 to Zybo JC
 
NET "VGA_red[0]" LOC = "V15";
 
 NET "VGA_red[0]" IOSTANDARD = LVCMOS33;
 
NET "VGA_red[1]" LOC = "W15";
 
 NET "VGA_red[1]" IOSTANDARD = LVCMOS33;
 
NET "VGA_red[2]" LOC = "T11";
 
 NET "VGA_red[2]" IOSTANDARD = LVCMOS33;
 
NET "VGA_red[3]" LOC = "T10";
 
 NET "VGA_red[3]" IOSTANDARD = LVCMOS33;
 
NET "VGA_blue[0]" LOC = "W14";
 
 NET "VGA_blue[0]" IOSTANDARD = LVCMOS33;
 
NET "VGA_blue[1]" LOC = "Y14";
 
 NET "VGA_blue[1]" IOSTANDARD = LVCMOS33;
 
NET "VGA_blue[2]" LOC = "T12";
 
 NET "VGA_blue[2]" IOSTANDARD = LVCMOS33;
 
NET "VGA_blue[3]" LOC = "U12";
 
 NET "VGA_blue[3]" IOSTANDARD = LVCMOS33;
 
 
##Pmod Header JD
##Pmod Header JD
#set_property -dict { PACKAGE_PIN T14   IOSTANDARD LVCMOS33     } [get_ports { jd[0] }]; #IO_L5P_T0_34 Sch=jd_p[1]
#set_property -dict { PACKAGE_PIN T14   IOSTANDARD LVCMOS33     } [get_ports { jd[0] }]; #IO_L5P_T0_34 Sch=jd_p[1]
#set_property -dict { PACKAGE_PIN T15   IOSTANDARD LVCMOS33     } [get_ports { jd[1] }]; #IO_L5N_T0_34 Sch=jd_n[1]
#set_property -dict { PACKAGE_PIN T15   IOSTANDARD LVCMOS33     } [get_ports { jd[1] }]; #IO_L5N_T0_34 Sch=jd_n[1]
#set_property -dict { PACKAGE_PIN P14   IOSTANDARD LVCMOS33     } [get_ports { jd[2] }]; #IO_L6P_T0_34 Sch=jd_p[2]
#set_property -dict { PACKAGE_PIN P14   IOSTANDARD LVCMOS33     } [get_ports { jd[2] }]; #IO_L6P_T0_34 Sch=jd_p[2]
#set_property -dict { PACKAGE_PIN R14   IOSTANDARD LVCMOS33     } [get_ports { jd[3] }]; #IO_L6N_T0_VREF_34 Sch=jd_n[2]
#set_property -dict { PACKAGE_PIN R14   IOSTANDARD LVCMOS33     } [get_ports { jd[3] }]; #IO_L6N_T0_VREF_34 Sch=jd_n[2]
#set_property -dict { PACKAGE_PIN U14   IOSTANDARD LVCMOS33     } [get_ports { jd[4] }]; #IO_L11P_T1_SRCC_34 Sch=jd_p[3]
#set_property -dict { PACKAGE_PIN U14   IOSTANDARD LVCMOS33     } [get_ports { jd[4] }]; #IO_L11P_T1_SRCC_34 Sch=jd_p[3]
#set_property -dict { PACKAGE_PIN U15   IOSTANDARD LVCMOS33     } [get_ports { jd[5] }]; #IO_L11N_T1_SRCC_34 Sch=jd_n[3]
#set_property -dict { PACKAGE_PIN U15   IOSTANDARD LVCMOS33     } [get_ports { jd[5] }]; #IO_L11N_T1_SRCC_34 Sch=jd_n[3]
#set_property -dict { PACKAGE_PIN V17   IOSTANDARD LVCMOS33     } [get_ports { jd[6] }]; #IO_L21P_T3_DQS_34 Sch=jd_p[4]
#set_property -dict { PACKAGE_PIN V17   IOSTANDARD LVCMOS33     } [get_ports { jd[6] }]; #IO_L21P_T3_DQS_34 Sch=jd_p[4]
#set_property -dict { PACKAGE_PIN V18   IOSTANDARD LVCMOS33     } [get_ports { jd[7] }]; #IO_L21N_T3_DQS_34 Sch=jd_n[4]
#set_property -dict { PACKAGE_PIN V18   IOSTANDARD LVCMOS33     } [get_ports { jd[7] }]; #IO_L21N_T3_DQS_34 Sch=jd_n[4]
 
# PmodVGA Connector J2 to Zybo JD
# Temp VGA output (the raw output from VDU8)
NET "VGA_green[0]" LOC = "T14";
NET "red" LOC = "T14";
 NET "VGA_green[0]" IOSTANDARD = LVCMOS33;
NET "red" IOSTANDARD = LVCMOS33;
NET "VGA_green[1]" LOC = "T15";
NET "green" LOC = "T15";
 NET "VGA_green[1]" IOSTANDARD = LVCMOS33;
NET "green" IOSTANDARD = LVCMOS33;
NET "VGA_green[2]" LOC = "P14";
NET "blue" LOC = "P14";
 NET "VGA_green[2]" IOSTANDARD = LVCMOS33;
NET "blue" IOSTANDARD = LVCMOS33;
NET "VGA_green[3]" LOC = "R14";
NET "hsync" LOC = "R14";
 NET "VGA_green[3]" IOSTANDARD = LVCMOS33;
NET "hsync" IOSTANDARD = LVCMOS33;
NET "VGA_hsync_n" LOC = "U14";
NET "vsync" LOC = "U14";
 NET "VGA_hsync_n" IOSTANDARD = LVCMOS33;
NET "vsync" IOSTANDARD = LVCMOS33;
NET "VGA_vsync_n" LOC = "U15";
NET "blank" LOC = "U15";
 NET "VGA_vsync_n" IOSTANDARD = LVCMOS33;
NET "blank" IOSTANDARD = LVCMOS33;
 
 
 
##Pmod Header JE
##Pmod Header JE
#set_property -dict { PACKAGE_PIN V12   IOSTANDARD LVCMOS33 } [get_ports { je[0] }]; #IO_L4P_T0_34 Sch=je[1]
#set_property -dict { PACKAGE_PIN V12   IOSTANDARD LVCMOS33 } [get_ports { je[0] }]; #IO_L4P_T0_34 Sch=je[1]
#set_property -dict { PACKAGE_PIN W16   IOSTANDARD LVCMOS33 } [get_ports { je[1] }]; #IO_L18N_T2_34 Sch=je[2]
#set_property -dict { PACKAGE_PIN W16   IOSTANDARD LVCMOS33 } [get_ports { je[1] }]; #IO_L18N_T2_34 Sch=je[2]
#set_property -dict { PACKAGE_PIN J15   IOSTANDARD LVCMOS33 } [get_ports { je[2] }]; #IO_25_35 Sch=je[3]
#set_property -dict { PACKAGE_PIN J15   IOSTANDARD LVCMOS33 } [get_ports { je[2] }]; #IO_25_35 Sch=je[3]
#set_property -dict { PACKAGE_PIN H15   IOSTANDARD LVCMOS33 } [get_ports { je[3] }]; #IO_L19P_T3_35 Sch=je[4]
#set_property -dict { PACKAGE_PIN H15   IOSTANDARD LVCMOS33 } [get_ports { je[3] }]; #IO_L19P_T3_35 Sch=je[4]
#set_property -dict { PACKAGE_PIN V13   IOSTANDARD LVCMOS33 } [get_ports { je[4] }]; #IO_L3N_T0_DQS_34 Sch=je[7]
#set_property -dict { PACKAGE_PIN V13   IOSTANDARD LVCMOS33 } [get_ports { je[4] }]; #IO_L3N_T0_DQS_34 Sch=je[7]
#set_property -dict { PACKAGE_PIN U17   IOSTANDARD LVCMOS33 } [get_ports { je[5] }]; #IO_L9N_T1_DQS_34 Sch=je[8]
#set_property -dict { PACKAGE_PIN U17   IOSTANDARD LVCMOS33 } [get_ports { je[5] }]; #IO_L9N_T1_DQS_34 Sch=je[8]
#set_property -dict { PACKAGE_PIN T17   IOSTANDARD LVCMOS33 } [get_ports { je[6] }]; #IO_L20P_T3_34 Sch=je[9]
#set_property -dict { PACKAGE_PIN T17   IOSTANDARD LVCMOS33 } [get_ports { je[6] }]; #IO_L20P_T3_34 Sch=je[9]
#set_property -dict { PACKAGE_PIN Y17   IOSTANDARD LVCMOS33 } [get_ports { je[7] }]; #IO_L7N_T1_34 Sch=je[10]
#set_property -dict { PACKAGE_PIN Y17   IOSTANDARD LVCMOS33 } [get_ports { je[7] }]; #IO_L7N_T1_34 Sch=je[10]
##Pmod Header JE
##PmodRS232 to Zybo JE
 
 
##PmodRS232
 
# Pin   Dir    Function      PMOD    Dir     Function PinLoc
# Pin   Dir    Function      PMOD    Dir     Function PinLoc
#  1    input   CTS          je<0>   output  CTS      W16
#  1    input   CTS          je<0>   output  CTS      W16
#  2    output  RTS          je<1>   input   RTS      V12
#  2    output  RTS          je<1>   input   RTS      V12
#  3    output  TXD          je<2>   input   RXD      J15
#  3    output  TXD          je<2>   input   RXD      J15
#  4    input   RXD          je<3>   output  TXD      H15
#  4    input   RXD          je<3>   output  TXD      H15
Line 244... Line 256...
# NET "RS232_RXD" IOSTANDARD = LVCMOS33;
# NET "RS232_RXD" IOSTANDARD = LVCMOS33;
# NET "RS232_TXD" LOC = "H15";
# NET "RS232_TXD" LOC = "H15";
# NET "RS232_TXD" IOSTANDARD = LVCMOS33;
# NET "RS232_TXD" IOSTANDARD = LVCMOS33;
# NET "RS232_TXD" DRIVE = 12;
# NET "RS232_TXD" DRIVE = 12;
# NET "RS232_TXD" SLEW = SLOW;
# NET "RS232_TXD" SLEW = SLOW;
 
# PmodUSBUART to Zybo JE
# PmodUSBUART                Zybo Pmod Port JE
 
# Pin   Dir    Function      PMOD    Dir     Function PinLoc
# Pin   Dir    Function      PMOD    Dir     Function PinLoc
#  1    output  RTS          je<0>   input   CTS      V12
#  1    output  RTS          je<0>   input   CTS      V12
#  2    input   RXD          je<1>   output  TXD      W16
#  2    input   RXD          je<1>   output  TXD      W16
#  3    output  TXD          je<2>   input   RXD      J15
#  3    output  TXD          je<2>   input   RXD      J15
#  4    input   CTS          je<3>   output  RTS      H15
#  4    input   CTS          je<3>   output  RTS      H15

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