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[/] [altor32/] [trunk/] [rtl/] [cpu/] [altor32_exec.v] - Diff between revs 39 and 40

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Rev 39 Rev 40
Line 87... Line 87...
    // Output
    // Output
    output [31:0]       opcode_o /*verilator public*/,
    output [31:0]       opcode_o /*verilator public*/,
    output [31:0]       opcode_pc_o /*verilator public*/,
    output [31:0]       opcode_pc_o /*verilator public*/,
    output [4:0]        reg_rd_o /*verilator public*/,
    output [4:0]        reg_rd_o /*verilator public*/,
    output [31:0]       reg_rd_value_o /*verilator public*/,
    output [31:0]       reg_rd_value_o /*verilator public*/,
    output              mult_o /*verilator public*/,
    output [63:0]       mult_res_o /*verilator public*/,
    output [31:0]       mult_res_o /*verilator public*/,
 
 
 
    // Register write back bypass
    // Register write back bypass
    input [4:0]         wb_rd_i /*verilator public*/,
    input [4:0]         wb_rd_i /*verilator public*/,
    input [31:0]        wb_rd_value_i /*verilator public*/,
    input [31:0]        wb_rd_value_i /*verilator public*/,
 
 
Line 311... Line 310...
    // Load pending / target
    // Load pending / target
    .load_pending_i(load_pending_w),
    .load_pending_i(load_pending_w),
    .rd_load_i(load_rd_q),
    .rd_load_i(load_rd_q),
 
 
    // Multiplier status
    // Multiplier status
    .mult_lo_ex_i(1'b0),
    .mult_ex_i(1'b0),
    .mult_hi_ex_i(1'b0),
 
    .mult_lo_wb_i(1'b0),
 
    .mult_hi_wb_i(1'b0),
 
 
 
    // Multiplier result
 
    .result_mult_i(64'b0),
 
 
 
    // Result (EXEC)
    // Result (EXEC)
    .result_ex_i(ex_result_w),
    .result_ex_i(ex_result_w),
 
 
    // Result (WB)
    // Result (WB)
Line 661... Line 654...
         alu_input_a_r  = reg_ra_r;
         alu_input_a_r  = reg_ra_r;
         alu_input_b_r  = reg_rb_r;
         alu_input_b_r  = reg_rb_r;
         write_rd_r     = 1'b1;
         write_rd_r     = 1'b1;
     end
     end
 
 
     inst_mul_w,   // l.mul
 
     inst_mulu_w:  // l.mulu
 
     begin
 
         write_rd_r     = 1'b1;
 
     end
 
 
 
     inst_addi_w: // l.addi
     inst_addi_w: // l.addi
     begin
     begin
         alu_func_r     = `ALU_ADD;
         alu_func_r     = `ALU_ADD;
         alu_input_a_r  = reg_ra_r;
         alu_input_a_r  = reg_ra_r;
         alu_input_b_r  = int32_r;
         alu_input_b_r  = int32_r;
Line 1619... Line 1606...
assign opcode_pc_o          = ex_opcode_pc_q;
assign opcode_pc_o          = ex_opcode_pc_q;
 
 
assign reg_rd_o             = ex_rd_q;
assign reg_rd_o             = ex_rd_q;
assign reg_rd_value_o       = ex_result_w;
assign reg_rd_value_o       = ex_result_w;
 
 
assign mult_o               = 1'b0;
assign mult_res_o           = 64'b0;
assign mult_res_o           = 32'b0;
 
 
 
//-------------------------------------------------------------------
//-------------------------------------------------------------------
// Hooks for debug
// Hooks for debug
//-------------------------------------------------------------------
//-------------------------------------------------------------------
`ifdef verilator
`ifdef verilator

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