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[/] [altor32/] [trunk/] [rtl/] [cpu_lite/] [altor32_regfile_alt.v] - Diff between revs 34 and 36

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Rev 34 Rev 36
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//-----------------------------------------------------------------
//-----------------------------------------------------------------
//                           AltOR32 
//                           AltOR32 
//                Alternative Lightweight OpenRisc 
//                Alternative Lightweight OpenRisc 
//                            V2.0
//                            V2.1
//                     Ultra-Embedded.com
//                     Ultra-Embedded.com
//                   Copyright 2011 - 2013
//                   Copyright 2011 - 2014
//
//
//               Email: admin@ultra-embedded.com
//               Email: admin@ultra-embedded.com
//
//
//                       License: LGPL
//                       License: LGPL
//-----------------------------------------------------------------
//-----------------------------------------------------------------
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    input           rst_i       /*verilator public*/,
    input           rst_i       /*verilator public*/,
    input           wr_i        /*verilator public*/,
    input           wr_i        /*verilator public*/,
    input [4:0]     rs_i        /*verilator public*/,
    input [4:0]     rs_i        /*verilator public*/,
    input [4:0]     rt_i        /*verilator public*/,
    input [4:0]     rt_i        /*verilator public*/,
    input [4:0]     rd_i        /*verilator public*/,
    input [4:0]     rd_i        /*verilator public*/,
    output [31:0]   reg_rs_o    /*verilator public*/,
    output reg [31:0] reg_rs_o    /*verilator public*/,
    output [31:0]   reg_rt_o    /*verilator public*/,
    output reg [31:0] reg_rt_o    /*verilator public*/,
    input [31:0]    reg_rd_i    /*verilator public*/
    input [31:0]    reg_rd_i    /*verilator public*/
);
);
 
 
//-----------------------------------------------------------------
//-----------------------------------------------------------------
// Params
// Params
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parameter       SUPPORT_32REGS = "ENABLED";
parameter       SUPPORT_32REGS = "ENABLED";
 
 
//-----------------------------------------------------------------
//-----------------------------------------------------------------
// Registers
// Registers
//-----------------------------------------------------------------
//-----------------------------------------------------------------
reg             clk_delayed;
wire            clk_delayed;
wire [31:0]     data_out1;
wire [31:0]     data_out1;
wire [31:0]     data_out2;
wire [31:0]     data_out2;
reg             write_enable;
reg             write_enable;
 
 
reg [31:0]      reg_rs_o;
 
reg [31:0]      reg_rt_o;
 
 
 
reg [4:0]       addr_reg;
reg [4:0]       addr_reg;
reg [31:0]      data_reg;
reg [31:0]      data_reg;
 
 
wire [31:0]     q1;
wire [31:0]     q1;
wire [31:0]     q2;
wire [31:0]     q2;

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