| Line 39... |
Line 39... |
//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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//
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//
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// CVS Revision History
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// CVS Revision History
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//
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//
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// $Log: not supported by cvs2svn $
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// $Log: not supported by cvs2svn $
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// Revision 1.50 2003/01/22 13:49:26 tadejm
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// When control packets were received, they were ignored in some cases.
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//
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// Revision 1.49 2003/01/21 12:09:40 mohor
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// Revision 1.49 2003/01/21 12:09:40 mohor
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// When receiving normal data frame and RxFlow control was switched on, RXB
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// When receiving normal data frame and RxFlow control was switched on, RXB
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// interrupt was not set.
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// interrupt was not set.
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//
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//
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// Revision 1.48 2003/01/20 12:05:26 mohor
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// Revision 1.48 2003/01/20 12:05:26 mohor
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| Line 484... |
Line 487... |
wire [1:0] TxValidBytes;
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wire [1:0] TxValidBytes;
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wire [7:0] TempTxBDAddress;
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wire [7:0] TempTxBDAddress;
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wire [7:0] TempRxBDAddress;
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wire [7:0] TempRxBDAddress;
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wire SetGotData;
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wire GotDataEvaluate;
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wire RxStatusWrite;
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wire RxStatusWrite;
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reg WB_ACK_O;
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reg WB_ACK_O;
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wire [8:0] RxStatusIn;
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wire [8:0] RxStatusIn;
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| Line 933... |
Line 933... |
always @ (posedge WB_CLK_I or posedge Reset)
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always @ (posedge WB_CLK_I or posedge Reset)
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begin
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begin
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if(Reset)
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if(Reset)
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ReadTxDataFromMemory <=#Tp 1'b0;
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ReadTxDataFromMemory <=#Tp 1'b0;
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else
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else
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if(TxLengthEq0 | TxAbortPacket | TxRetryPacket)
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if(TxLengthEq0 | TxAbortPulse | TxRetryPulse)
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ReadTxDataFromMemory <=#Tp 1'b0;
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ReadTxDataFromMemory <=#Tp 1'b0;
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else
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else
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if(SetReadTxDataFromMemory)
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if(SetReadTxDataFromMemory)
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ReadTxDataFromMemory <=#Tp 1'b1;
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ReadTxDataFromMemory <=#Tp 1'b1;
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end
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end
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reg tx_burst_en;
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reg tx_burst_en;
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reg rx_burst_en;
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reg rx_burst_en;
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reg BlockingLastReadOn_Abort_Retry;
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wire ReadTxDataFromMemory_2 = ReadTxDataFromMemory & ~BlockReadTxDataFromMemory & ~BlockingLastReadOn_Abort_Retry;
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wire ReadTxDataFromMemory_2 = ReadTxDataFromMemory & ~BlockReadTxDataFromMemory;
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wire tx_burst = ReadTxDataFromMemory_2 & tx_burst_en;
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wire tx_burst = ReadTxDataFromMemory_2 & tx_burst_en;
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wire [31:0] TxData_wb;
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wire [31:0] TxData_wb;
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wire ReadTxDataFromFifo_wb;
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wire ReadTxDataFromFifo_wb;
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always @ (posedge WB_CLK_I or posedge Reset)
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always @ (posedge WB_CLK_I or posedge Reset)
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begin
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begin
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if(Reset)
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if(Reset)
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BlockReadTxDataFromMemory <=#Tp 1'b0;
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BlockReadTxDataFromMemory <=#Tp 1'b0;
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else
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else
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if((TxBufferAlmostFull | TxLength <= 4)& MasterWbTX & (~cyc_cleared) & (!(TxAbortPacket | TxRetryPacket)))
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if((TxBufferAlmostFull | TxLength <= 4)& MasterWbTX & (~cyc_cleared) & (!(TxAbortPacket_NotCleared | TxRetryPacket_NotCleared)))
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BlockReadTxDataFromMemory <=#Tp 1'b1;
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BlockReadTxDataFromMemory <=#Tp 1'b1;
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else
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else
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if(ReadTxDataFromFifo_wb | TxDonePacket | TxAbortPacket | TxRetryPacket)
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if(ReadTxDataFromFifo_wb | TxDonePacket | TxAbortPacket | TxRetryPacket)
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BlockReadTxDataFromMemory <=#Tp 1'b0;
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BlockReadTxDataFromMemory <=#Tp 1'b0;
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end
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end
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always @ (posedge WB_CLK_I or posedge Reset)
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begin
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if(Reset)
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BlockingLastReadOn_Abort_Retry <=#Tp 1'b0;
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else
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if(TxAbortPacket | TxRetryPacket)
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BlockingLastReadOn_Abort_Retry <=#Tp 1'b0;
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else
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if(((TxAbort_wb & !TxAbortPacket_NotCleared) | (TxRetry_wb & !TxRetryPacket_NotCleared)) & !TxBDReady)
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BlockingLastReadOn_Abort_Retry <=#Tp 1'b1;
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end
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assign MasterAccessFinished = m_wb_ack_i | m_wb_err_i;
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assign MasterAccessFinished = m_wb_ack_i | m_wb_err_i;
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wire [`ETH_TX_FIFO_CNT_WIDTH-1:0] txfifo_cnt;
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wire [`ETH_TX_FIFO_CNT_WIDTH-1:0] txfifo_cnt;
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wire [`ETH_RX_FIFO_CNT_WIDTH-1:0] rxfifo_cnt;
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wire [`ETH_RX_FIFO_CNT_WIDTH-1:0] rxfifo_cnt;
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reg [`ETH_BURST_CNT_WIDTH-1:0] tx_burst_cnt;
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reg [`ETH_BURST_CNT_WIDTH-1:0] tx_burst_cnt;
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reg [`ETH_BURST_CNT_WIDTH-1:0] rx_burst_cnt;
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reg [`ETH_BURST_CNT_WIDTH-1:0] rx_burst_cnt;
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| Line 1269... |
Line 1253... |
TxStartFrm <=#Tp 1'b0;
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TxStartFrm <=#Tp 1'b0;
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else
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else
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if(TxStartFrm_sync2)
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if(TxStartFrm_sync2)
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TxStartFrm <=#Tp 1'b1;
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TxStartFrm <=#Tp 1'b1;
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else
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else
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if(TxUsedData_q | ~TxStartFrm_sync2 & (TxRetry | TxAbort))
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if(TxUsedData_q | ~TxStartFrm_sync2 & (TxRetry & (~TxRetry_q) | TxAbort & (~TxAbort_q)))
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TxStartFrm <=#Tp 1'b0;
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TxStartFrm <=#Tp 1'b0;
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end
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end
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// End: Generation of the TxStartFrm_wb which is then synchronized to the MTxClk
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// End: Generation of the TxStartFrm_wb which is then synchronized to the MTxClk
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| Line 1423... |
Line 1407... |
always @ (posedge WB_CLK_I or posedge Reset)
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always @ (posedge WB_CLK_I or posedge Reset)
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begin
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begin
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if(Reset)
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if(Reset)
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TxAbortPacket <=#Tp 1'b0;
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TxAbortPacket <=#Tp 1'b0;
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else
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else
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if(TxAbort_wb & !tx_burst_en & MasterWbTX & MasterAccessFinished & !TxAbortPacketBlocked |
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if(TxAbort_wb & (~tx_burst_en) & MasterWbTX & MasterAccessFinished & (~TxAbortPacketBlocked) |
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TxAbort_wb & !MasterWbTX & !TxAbortPacketBlocked)
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TxAbort_wb & (~MasterWbTX) & (~TxAbortPacketBlocked))
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TxAbortPacket <=#Tp 1'b1;
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TxAbortPacket <=#Tp 1'b1;
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else
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else
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TxAbortPacket <=#Tp 1'b0;
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TxAbortPacket <=#Tp 1'b0;
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end
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end
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| Line 1439... |
Line 1423... |
TxAbortPacket_NotCleared <=#Tp 1'b0;
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TxAbortPacket_NotCleared <=#Tp 1'b0;
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else
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else
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if(TxEn & TxEn_q & TxAbortPacket_NotCleared)
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if(TxEn & TxEn_q & TxAbortPacket_NotCleared)
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TxAbortPacket_NotCleared <=#Tp 1'b0;
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TxAbortPacket_NotCleared <=#Tp 1'b0;
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else
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else
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if(TxAbort_wb & !tx_burst_en & MasterWbTX & MasterAccessFinished |
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if(TxAbort_wb & (~tx_burst_en) & MasterWbTX & MasterAccessFinished & (~TxAbortPacketBlocked) |
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TxAbort_wb & !MasterWbTX)
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TxAbort_wb & (~MasterWbTX) & (~TxAbortPacketBlocked))
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TxAbortPacket_NotCleared <=#Tp 1'b1;
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TxAbortPacket_NotCleared <=#Tp 1'b1;
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end
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end
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always @ (posedge WB_CLK_I or posedge Reset)
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always @ (posedge WB_CLK_I or posedge Reset)
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| Line 1480... |
Line 1464... |
TxRetryPacket_NotCleared <=#Tp 1'b0;
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TxRetryPacket_NotCleared <=#Tp 1'b0;
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else
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else
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if(StartTxBDRead)
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if(StartTxBDRead)
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TxRetryPacket_NotCleared <=#Tp 1'b0;
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TxRetryPacket_NotCleared <=#Tp 1'b0;
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else
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else
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if(TxRetry_wb & !tx_burst_en & MasterWbTX & MasterAccessFinished |
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if(TxRetry_wb & !tx_burst_en & MasterWbTX & MasterAccessFinished & !TxRetryPacketBlocked |
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TxRetry_wb & !MasterWbTX)
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TxRetry_wb & !MasterWbTX & !TxRetryPacketBlocked)
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TxRetryPacket_NotCleared <=#Tp 1'b1;
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TxRetryPacket_NotCleared <=#Tp 1'b1;
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end
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end
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always @ (posedge WB_CLK_I or posedge Reset)
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always @ (posedge WB_CLK_I or posedge Reset)
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| Line 1521... |
Line 1505... |
TxDonePacket_NotCleared <=#Tp 1'b0;
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TxDonePacket_NotCleared <=#Tp 1'b0;
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else
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else
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if(TxEn & TxEn_q & TxDonePacket_NotCleared)
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if(TxEn & TxEn_q & TxDonePacket_NotCleared)
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TxDonePacket_NotCleared <=#Tp 1'b0;
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TxDonePacket_NotCleared <=#Tp 1'b0;
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else
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else
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if(TxDone_wb & !tx_burst_en & MasterWbTX & MasterAccessFinished |
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if(TxDone_wb & !tx_burst_en & MasterWbTX & MasterAccessFinished & (~TxDonePacketBlocked) |
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TxDone_wb & !MasterWbTX)
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TxDone_wb & !MasterWbTX & (~TxDonePacketBlocked))
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TxDonePacket_NotCleared <=#Tp 1'b1;
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TxDonePacket_NotCleared <=#Tp 1'b1;
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end
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end
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always @ (posedge WB_CLK_I or posedge Reset)
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always @ (posedge WB_CLK_I or posedge Reset)
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| Line 1540... |
Line 1524... |
if(!TxDone_wb & TxDone_wb_q)
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if(!TxDone_wb & TxDone_wb_q)
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TxDonePacketBlocked <=#Tp 1'b0;
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TxDonePacketBlocked <=#Tp 1'b0;
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end
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end
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// Sinchronizing and evaluating tx data
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//assign SetGotData = (TxStartFrm_wb | NewTxDataAvaliable_wb & ~TxAbort_wb & ~TxRetry_wb) & ~WB_CLK_I;
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assign SetGotData = (TxStartFrm_wb);
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// Evaluating data. If abort or retry occured meanwhile than data is ignored.
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//assign GotDataEvaluate = GotDataSync3 & ~GotData & (~TxRetry & ~TxAbort | (TxRetry | TxAbort) & (TxStartFrm));
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assign GotDataEvaluate = (~TxRetry & ~TxAbort | (TxRetry | TxAbort) & (TxStartFrm));
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// Indication of the last word
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// Indication of the last word
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always @ (posedge MTxClk or posedge Reset)
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always @ (posedge MTxClk or posedge Reset)
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begin
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begin
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if(Reset)
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if(Reset)
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LastWord <=#Tp 1'b0;
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LastWord <=#Tp 1'b0;
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