| Line 41... |
Line 41... |
//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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//
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//
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// CVS Revision History
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// CVS Revision History
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//
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//
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// $Log: not supported by cvs2svn $
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// $Log: not supported by cvs2svn $
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// Revision 1.5 2002/01/23 10:28:16 mohor
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// Link in the header changed.
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//
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// Revision 1.4 2001/10/19 08:43:51 mohor
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// Revision 1.4 2001/10/19 08:43:51 mohor
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// eth_timescale.v changed to timescale.v This is done because of the
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// eth_timescale.v changed to timescale.v This is done because of the
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// simulation of the few cores in a one joined project.
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// simulation of the few cores in a one joined project.
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//
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//
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// Revision 1.3 2001/10/18 12:07:11 mohor
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// Revision 1.3 2001/10/18 12:07:11 mohor
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| Line 120... |
Line 123... |
wire StartPreamble;
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wire StartPreamble;
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wire StartSFD;
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wire StartSFD;
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// Defining the next state
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// Defining the next state
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assign StartIdle = ~MRxDV & (StateDrop | StatePreamble | StateSFD | (|StateData) & (ByteCntEq0 | ByteCntGreat2));
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assign StartIdle = ~MRxDV & (StateDrop | StatePreamble | StateSFD | (|StateData));
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assign StartPreamble = MRxDV & ~MRxDEq5 & (StateIdle & ~Transmitting);
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assign StartPreamble = MRxDV & ~MRxDEq5 & (StateIdle & ~Transmitting);
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//assign StartSFD = MRxDV & MRxDEq5 & (StateIdle & ~Transmitting);
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assign StartSFD = MRxDV & MRxDEq5 & (StateIdle & ~Transmitting | StatePreamble);
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assign StartSFD = MRxDV & MRxDEq5 & (StateIdle & ~Transmitting | StatePreamble);
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assign StartData0 = MRxDV & (StateSFD & MRxDEqD & IFGCounterEq24 | StateData1);
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assign StartData0 = MRxDV & (StateSFD & MRxDEqD & IFGCounterEq24 | StateData1);
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assign StartData1 = MRxDV & StateData0;
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assign StartData1 = MRxDV & StateData0 & (~ByteCntMaxFrame);
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assign StartDrop = MRxDV & (StateIdle & Transmitting | StateSFD & ~IFGCounterEq24 & MRxDEqD
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assign StartDrop = MRxDV & (StateIdle & Transmitting | StateSFD & ~IFGCounterEq24 & MRxDEqD
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| StateData0 & ByteCntMaxFrame
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| StateData0 & ByteCntMaxFrame
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);
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);
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