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////  README.txt                                                  ////
////  README.txt                                                  ////
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////  This file is part of the Ethernet IP core project           ////
////  This file is part of the Ethernet IP core project           ////
////  http://www.opencores.org/projects/ethmac/                   ////
////  http://www.opencores.org/projects/ethmac/                   ////
////                                                              ////
////                                                              ////
////  Author(s):                                                  ////
////  Author(s):                                                  ////
////      - Igor Mohor (igorM@opencores.org)                      ////
////      - Igor Mohor (igorM@opencores.org)                      ////
////                                                              ////
////                                                              ////
////                                                              ////
////                                                              ////
//////////////////////////////////////////////////////////////////////
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////                                                              ////
////                                                              ////
//// Copyright (C) 2001, 2002 Authors                             ////
//// Copyright (C) 2001, 2002 Authors                             ////
////                                                              ////
////                                                              ////
//// This source file may be used and distributed without         ////
//// This source file may be used and distributed without         ////
//// restriction provided that this copyright statement is not    ////
//// restriction provided that this copyright statement is not    ////
//// removed from the file and that any derivative work contains  ////
//// removed from the file and that any derivative work contains  ////
//// the original copyright notice and the associated disclaimer. ////
//// the original copyright notice and the associated disclaimer. ////
////                                                              ////
////                                                              ////
//// This source file is free software; you can redistribute it   ////
//// This source file is free software; you can redistribute it   ////
//// and/or modify it under the terms of the GNU Lesser General   ////
//// and/or modify it under the terms of the GNU Lesser General   ////
//// Public License as published by the Free Software Foundation; ////
//// Public License as published by the Free Software Foundation; ////
//// either version 2.1 of the License, or (at your option) any   ////
//// either version 2.1 of the License, or (at your option) any   ////
//// later version.                                               ////
//// later version.                                               ////
////                                                              ////
////                                                              ////
//// This source is distributed in the hope that it will be       ////
//// This source is distributed in the hope that it will be       ////
//// useful, but WITHOUT ANY WARRANTY; without even the implied   ////
//// useful, but WITHOUT ANY WARRANTY; without even the implied   ////
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR      ////
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR      ////
//// PURPOSE.  See the GNU Lesser General Public License for more ////
//// PURPOSE.  See the GNU Lesser General Public License for more ////
//// details.                                                     ////
//// details.                                                     ////
////                                                              ////
////                                                              ////
//// You should have received a copy of the GNU Lesser General    ////
//// You should have received a copy of the GNU Lesser General    ////
//// Public License along with this source; if not, download it   ////
//// Public License along with this source; if not, download it   ////
//// from http://www.opencores.org/lgpl.shtml                     ////
//// from http://www.opencores.org/lgpl.shtml                     ////
////                                                              ////
////                                                              ////
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RUNNING the simulation/Testbench in ModelSIM:
RUNNING the simulation/Testbench in ModelSIM:
Open ModelSIM project: ethernet/sim/rtl_sim/modelsim_sim/bin/ethernet.mpf
Open ModelSIM project: ethernet/sim/rtl_sim/modelsim_sim/bin/ethernet.mpf
Run the macro do.do (write "do do.do" in the command window).
Run the macro do.do (write "do do.do" in the command window).
Simulation will be automatically started. Logs are stored in the /log
Simulation will be automatically started. Logs are stored in the /log
directory. tb_ethernet test is performed.
directory. tb_ethernet test is performed.
RUNNING the simulation/Testbench in Ncsim:
RUNNING the simulation/Testbench in Ncsim:
Go to the ethernet\sim\rtl_sim\ncsim_sim\run directory. Run the
Go to the ethernet\sim\rtl_sim\ncsim_sim\run directory. Run the
run_eth_sim_regr.scr script. Simulation is automatically started. Logs are
run_eth_sim_regr.scr script. Simulation is automatically started. Logs are
stored in the /log directory. Before running the script for another time,
stored in the /log directory. Before running the script for another time,
run the clean script that deletes files from previous runs. tb_ethernet test
run the clean script that deletes files from previous runs. tb_ethernet test
is performed.
is performed.
Why are eth_cop.v, eth_host.v, eth_memory, tb_cop.v and tb_ethernet_with_cop.v
Why are eth_cop.v, eth_host.v, eth_memory, tb_cop.v and tb_ethernet_with_cop.v
files used for?
files used for?
Although the testbench does not include the traffic coprocessor, the
Although the testbench does not include the traffic coprocessor, the
coprocessor is part of the ethernet environment. eth_cop multiplexes
coprocessor is part of the ethernet environment. eth_cop multiplexes
two wishbone interface between 4 modules:
two wishbone interface between 4 modules:
- First wishbone master interface is connected to the HOST (eth_host)
- First wishbone master interface is connected to the HOST (eth_host)
- Second wishbone master interface is connected to the Ethernet Core (for
- Second wishbone master interface is connected to the Ethernet Core (for
  accessing data in the memory (eth_memory)).
  accessing data in the memory (eth_memory)).
- First wishbone slave interface is connected to the Ethernet Core (for
- First wishbone slave interface is connected to the Ethernet Core (for
  accessing registers and buffer descriptors).
  accessing registers and buffer descriptors).
- Second wishbone slave interface is connected to the memory (eth_memory)
- Second wishbone slave interface is connected to the memory (eth_memory)
  so host can write data to the memory (or read data from the memory.
  so host can write data to the memory (or read data from the memory.
tb_cop.c is a testbench just for the traffic coprocessor (eth_cop).
tb_cop.c is a testbench just for the traffic coprocessor (eth_cop).
tb_ethernet_with_cop.v is a simple testbench where all above mentioned
tb_ethernet_with_cop.v is a simple testbench where all above mentioned
modules are connected into a single environment. Few packets are transmitted
modules are connected into a single environment. Few packets are transmitted
and received. The "main" testbench is tb_ethernet.v file. It performs several
and received. The "main" testbench is tb_ethernet.v file. It performs several
tests (eth_cop is not part of the simulation environment).
tests (eth_cop is not part of the simulation environment).
 
 

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