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[/] [ethmac/] [trunk/] [bench/] [verilog/] [tb_ethernet.v] - Diff between revs 299 and 302

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Rev 299 Rev 302
Line 40... Line 40...
//////////////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////////////
//
//
// CVS Revision History
// CVS Revision History
//
//
// $Log: not supported by cvs2svn $
// $Log: not supported by cvs2svn $
 
// Revision 1.29  2003/08/20 12:06:24  mohor
 
// Artisan RAMs added.
 
//
// Revision 1.28  2003/01/31 15:58:27  mohor
// Revision 1.28  2003/01/31 15:58:27  mohor
// Tests test_mac_full_duplex_receive 4-7  fixed to proper BD.
// Tests test_mac_full_duplex_receive 4-7  fixed to proper BD.
//
//
// Revision 1.27  2003/01/30 13:38:15  mohor
// Revision 1.27  2003/01/30 13:38:15  mohor
// Underrun test fixed. Many other tests fixed.
// Underrun test fixed. Many other tests fixed.
Line 209... Line 212...
  .int_o(wb_int)
  .int_o(wb_int)
 
 
  // Bist
  // Bist
`ifdef ETH_BIST
`ifdef ETH_BIST
  ,
  ,
  .scanb_rst      (1'b1),
  .mbist_si_i       (1'b0),
  .scanb_clk      (1'b0),
  .mbist_so_o       (),
  .scanb_si       (1'b0),
  .mbist_ctrl_i       (3'b001) // {enable, clock, reset}
  .scanb_so       (),
 
  .scanb_en       (1'b0)
 
`endif
`endif
);
);
 
 
 
 
 
 

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