URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac/] [trunk/] [bench/] [verilog/] [wb_model_defines.v] - Diff between revs 170 and 315

Rev 170	Rev 315
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`//////////////////////////////////////////////////////////////////////`	`//////////////////////////////////////////////////////////////////////`
`//`	`//`
`// CVS Revision History`	`// CVS Revision History`
`//`	`//`
`// $Log: not supported by cvs2svn $`	`// $Log: not supported by cvs2svn $`
	`// Revision 1.2 2002/09/13 12:29:14 mohor`
	`// Headers changed.`
	`//`
`//`	`//`
`//`	`//`
`//`	`//`

`// WISHBONE frequency in GHz`	`// WISHBONE frequency in GHz`
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`// some common types and defines`	`// some common types and defines`
`define WB_ADDR_WIDTH 32	`define WB_ADDR_WIDTH 32
`define WB_DATA_WIDTH 32	`define WB_DATA_WIDTH 32
`define WB_SEL_WIDTH `WB_DATA_WIDTH/8	`define WB_SEL_WIDTH `WB_DATA_WIDTH/8
`define WB_TAG_WIDTH 1	`define WB_TAG_WIDTH 5
`define WB_ADDR_TYPE [(`WB_ADDR_WIDTH - 1):0]	`define WB_ADDR_TYPE [(`WB_ADDR_WIDTH - 1):0]
`define WB_DATA_TYPE [(`WB_DATA_WIDTH - 1):0]	`define WB_DATA_TYPE [(`WB_DATA_WIDTH - 1):0]
`define WB_SEL_TYPE [(`WB_SEL_WIDTH - 1):0]	`define WB_SEL_TYPE [(`WB_SEL_WIDTH - 1):0]
`define WB_TAG_TYPE [(`WB_TAG_WIDTH - 1):0]	`define WB_TAG_TYPE [(`WB_TAG_WIDTH - 1):0]