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[/] [ethmac/] [trunk/] [rtl/] [verilog/] [eth_cop.v] - Diff between revs 160 and 212

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Rev 160 Rev 212
Line 39... Line 39...
//////////////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////////////
//
//
// CVS Revision History
// CVS Revision History
//
//
// $Log: not supported by cvs2svn $
// $Log: not supported by cvs2svn $
 
// Revision 1.2  2002/09/09 12:54:13  mohor
 
// error acknowledge cycle termination added to display.
 
//
// Revision 1.1  2002/08/14 17:16:07  mohor
// Revision 1.1  2002/08/14 17:16:07  mohor
// Traffic cop with 2 wishbone master interfaces and 2 wishbona slave
// Traffic cop with 2 wishbone master interfaces and 2 wishbona slave
// interfaces:
// interfaces:
// - Host connects to the master interface
// - Host connects to the master interface
// - Ethernet master (DMA) connects to the second master interface
// - Ethernet master (DMA) connects to the second master interface
Line 336... Line 339...
end
end
 
 
always @ (posedge wb_clk_i)
always @ (posedge wb_clk_i)
begin
begin
  if(cnt==1000) begin
  if(cnt==1000) begin
    $display("(%0t) ERROR: WB activity ??? ", $time);
    $display("(%0t)(%m) ERROR: WB activity ??? ", $time);
    if(s1_wb_cyc_o) begin
    if(s1_wb_cyc_o) begin
      $display("s1_wb_dat_o = 0x%0x", s1_wb_dat_o);
      $display("s1_wb_dat_o = 0x%0x", s1_wb_dat_o);
      $display("s1_wb_adr_o = 0x%0x", s1_wb_adr_o);
      $display("s1_wb_adr_o = 0x%0x", s1_wb_adr_o);
      $display("s1_wb_sel_o = 0x%0x", s1_wb_sel_o);
      $display("s1_wb_sel_o = 0x%0x", s1_wb_sel_o);
      $display("s1_wb_we_o = 0x%0x", s1_wb_we_o);
      $display("s1_wb_we_o = 0x%0x", s1_wb_we_o);

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