OpenCores
URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac/] [trunk/] [rtl/] [verilog/] [eth_crc.v] - Diff between revs 346 and 352

Show entire file | Details | Blame | View Log

Rev 346 Rev 352
Line 77... Line 77...
`include "timescale.v"
`include "timescale.v"
 
 
module eth_crc (Clk, Reset, Data, Enable, Initialize, Crc, CrcError);
module eth_crc (Clk, Reset, Data, Enable, Initialize, Crc, CrcError);
 
 
 
 
parameter Tp = 1;
 
 
 
input Clk;
input Clk;
input Reset;
input Reset;
input [3:0] Data;
input [3:0] Data;
input Enable;
input Enable;
input Initialize;
input Initialize;
Line 130... Line 128...
 
 
 
 
always @ (posedge Clk or posedge Reset)
always @ (posedge Clk or posedge Reset)
begin
begin
  if (Reset)
  if (Reset)
    Crc <= #1 32'hffffffff;
    Crc <=  32'hffffffff;
  else
  else
  if(Initialize)
  if(Initialize)
    Crc <= #Tp 32'hffffffff;
    Crc <=  32'hffffffff;
  else
  else
    Crc <= #Tp CrcNext;
    Crc <=  CrcNext;
end
end
 
 
assign CrcError = Crc[31:0] != 32'hc704dd7b;  // CRC not equal to magic number
assign CrcError = Crc[31:0] != 32'hc704dd7b;  // CRC not equal to magic number
 
 
endmodule
endmodule

powered by: WebSVN 2.1.0

© copyright 1999-2021 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.