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[/] [ethmac/] [trunk/] [rtl/] [verilog/] [eth_rxcounters.v] - Diff between revs 352 and 353

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Rev 352 Rev 353
Line 142... Line 142...
 
 
 
 
always @ (posedge MRxClk or posedge Reset)
always @ (posedge MRxClk or posedge Reset)
begin
begin
  if(Reset)
  if(Reset)
    ByteCnt[15:0] <=  16'h0;
    ByteCnt[15:0] <=  16'd0;
  else
  else
    begin
    begin
      if(ResetByteCounter)
      if(ResetByteCounter)
        ByteCnt[15:0] <=  16'h0;
        ByteCnt[15:0] <=  16'd0;
      else
      else
      if(IncrementByteCounter)
      if(IncrementByteCounter)
        ByteCnt[15:0] <=  ByteCnt[15:0] + 1'b1;
        ByteCnt[15:0] <=  ByteCnt[15:0] + 16'd1;
     end
     end
end
end
 
 
assign ByteCntDelayed = ByteCnt + 3'h4;
assign ByteCntDelayed = ByteCnt + 16'd4;
assign ByteCntOut = DlyCrcEn? ByteCntDelayed : ByteCnt;
assign ByteCntOut = DlyCrcEn? ByteCntDelayed : ByteCnt;
 
 
assign ByteCntEq0       = ByteCnt == 16'h0;
assign ByteCntEq0       = ByteCnt == 16'd0;
assign ByteCntEq1       = ByteCnt == 16'h1;
assign ByteCntEq1       = ByteCnt == 16'd1;
assign ByteCntEq2       = ByteCnt == 16'h2;
assign ByteCntEq2       = ByteCnt == 16'd2;
assign ByteCntEq3       = ByteCnt == 16'h3;
assign ByteCntEq3       = ByteCnt == 16'd3;
assign ByteCntEq4       = ByteCnt == 16'h4;
assign ByteCntEq4       = ByteCnt == 16'd4;
assign ByteCntEq5       = ByteCnt == 16'h5;
assign ByteCntEq5       = ByteCnt == 16'd5;
assign ByteCntEq6       = ByteCnt == 16'h6;
assign ByteCntEq6       = ByteCnt == 16'd6;
assign ByteCntEq7       = ByteCnt == 16'h7;
assign ByteCntEq7       = ByteCnt == 16'd7;
assign ByteCntGreat2    = ByteCnt >  16'h2;
assign ByteCntGreat2    = ByteCnt >  16'd2;
assign ByteCntSmall7    = ByteCnt <  16'h7;
assign ByteCntSmall7    = ByteCnt <  16'd7;
assign ByteCntMax       = ByteCnt == 16'hffff;
assign ByteCntMax       = ByteCnt == 16'hffff;
assign ByteCntMaxFrame  = ByteCnt == MaxFL[15:0] & ~HugEn;
assign ByteCntMaxFrame  = ByteCnt == MaxFL[15:0] & ~HugEn;
 
 
 
 
assign ResetIFGCounter = StateSFD  &  MRxDV & MRxDEqD | StateDrop;
assign ResetIFGCounter = StateSFD  &  MRxDV & MRxDEqD | StateDrop;
Line 184... Line 184...
    begin
    begin
      if(ResetIFGCounter)
      if(ResetIFGCounter)
        IFGCounter[4:0] <=  5'h0;
        IFGCounter[4:0] <=  5'h0;
      else
      else
      if(IncrementIFGCounter)
      if(IncrementIFGCounter)
        IFGCounter[4:0] <=  IFGCounter[4:0] + 1'b1;
        IFGCounter[4:0] <=  IFGCounter[4:0] + 5'd1;
    end
    end
end
end
 
 
 
 
 
 
Line 206... Line 206...
      else
      else
      if(DlyCrcEn & StateSFD)
      if(DlyCrcEn & StateSFD)
        DlyCrcCnt[3:0] <=  4'h1;
        DlyCrcCnt[3:0] <=  4'h1;
      else
      else
      if(DlyCrcEn & (|DlyCrcCnt[3:0]))
      if(DlyCrcEn & (|DlyCrcCnt[3:0]))
        DlyCrcCnt[3:0] <=  DlyCrcCnt[3:0] + 1'b1;
        DlyCrcCnt[3:0] <=  DlyCrcCnt[3:0] + 4'd1;
    end
    end
end
end
 
 
 
 
endmodule
endmodule

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