OpenCores
URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac/] [trunk/] [sim/] [rtl_sim/] [modelsim_sim/] [run/] [tb_eth.do] - Diff between revs 338 and 356

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 338 Rev 356
Line 61... Line 61...
#write format wave -window .wave C:/Projects/ethernet/tadejm/ethernet/sim/rtl_sim/modelsim_sim/bin/wave.do
#write format wave -window .wave C:/Projects/ethernet/tadejm/ethernet/sim/rtl_sim/modelsim_sim/bin/wave.do
#.main clear
#.main clear
 
 
vlog -reportprogress 300 -work work {../../../../rtl/verilog/eth_clockgen.v}
vlog -reportprogress 300 -work work {../../../../rtl/verilog/eth_clockgen.v}
vlog -reportprogress 300 -work work {../../../../rtl/verilog/eth_crc.v}
vlog -reportprogress 300 -work work {../../../../rtl/verilog/eth_crc.v}
vlog -reportprogress 300 -work work {../../../../rtl/verilog/eth_defines.v}
vlog -reportprogress 300 -work work {../../../../rtl/verilog/ethmac_defines.v}
vlog -reportprogress 300 -work work {../../../../rtl/verilog/eth_fifo.v}
vlog -reportprogress 300 -work work {../../../../rtl/verilog/eth_fifo.v}
vlog -reportprogress 300 -work work {../../../../rtl/verilog/eth_maccontrol.v}
vlog -reportprogress 300 -work work {../../../../rtl/verilog/eth_maccontrol.v}
vlog -reportprogress 300 -work work {../../../../rtl/verilog/eth_macstatus.v}
vlog -reportprogress 300 -work work {../../../../rtl/verilog/eth_macstatus.v}
vlog -reportprogress 300 -work work {../../../../rtl/verilog/eth_miim.v}
vlog -reportprogress 300 -work work {../../../../rtl/verilog/eth_miim.v}
vlog -reportprogress 300 -work work {../../../../rtl/verilog/eth_outputcontrol.v}
vlog -reportprogress 300 -work work {../../../../rtl/verilog/eth_outputcontrol.v}

powered by: WebSVN 2.1.0

© copyright 1999-2020 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.