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[/] [minsoc/] [trunk/] [rtl/] [verilog/] [minsoc_top.v] - Diff between revs 52 and 56

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Rev 52 Rev 56
Line 293... Line 293...
//
//
// Clock Divider
// Clock Divider
//
//
minsoc_clock_manager #
minsoc_clock_manager #
(
(
   .divisor(`CLOCK_DIVISOR),
   .divisor(`CLOCK_DIVISOR)
   .multiplier(`CLOCK_MULTIPLIER)
 
)
)
clk_adjust (
clk_adjust (
        .clk_i(clk),
        .clk_i(clk),
        .clk_o(wb_clk)
        .clk_o(wb_clk)
);
);

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