OpenCores
URL https://opencores.org/ocsvn/mod_sim_exp/mod_sim_exp/trunk

Subversion Repositories mod_sim_exp

[/] [mod_sim_exp/] [trunk/] [doc/] [src/] [acknowl.tex] - Diff between revs 47 and 78

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 47 Rev 78
Line 18... Line 18...
        \hline
        \hline
        1.0 & November 2012     & JDC   & Added sections ``Acknowledgement'' and ``Performance and resource usage'' as well as different fonts for \textit{variables} and \verb|signal_names|\\
        1.0 & November 2012     & JDC   & Added sections ``Acknowledgement'' and ``Performance and resource usage'' as well as different fonts for \textit{variables} and \verb|signal_names|\\
        \hline
        \hline
        1.1 & November 2012     & GO    & Added this ``Document Revision History''. Made several small changes in layout and formulation.\\
        1.1 & November 2012     & GO    & Added this ``Document Revision History''. Made several small changes in layout and formulation.\\
        \hline
        \hline
 
        1.2 & March 2013        & JDC   & Added information about the new possible RAM structures\\
 
        \hline
 
        1.3 & March 2013        & GO    & Revision of newly added RAM structures\\
 
        \hline
\end{tabular}%
\end{tabular}%
 
 
\section*{Author info}
\section*{Author info}
 
 
\begin{itemize}
\begin{itemize}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.