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[/] [mod_sim_exp/] [trunk/] [rtl/] [vhdl/] [core/] [operand_ram_asym.vhd] - Diff between revs 67 and 69

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Rev 67 Rev 69
Line 169... Line 169...
          weB   => write_result,
          weB   => write_result,
          dinB  => result_in((i+1)*RAMblock_maxwidth-1 downto i*RAMblock_maxwidth),
          dinB  => result_in((i+1)*RAMblock_maxwidth-1 downto i*RAMblock_maxwidth),
          doutB => operand_out((i+1)*RAMblock_maxwidth-1 downto i*RAMblock_maxwidth)
          doutB => operand_out((i+1)*RAMblock_maxwidth-1 downto i*RAMblock_maxwidth)
        );
        );
        -- weA, weB
        -- weA, weB
        process (write_operand_i, write_result, operand_addr)
        process (write_operand_i, operand_addr)
        begin
        begin
          if operand_addr(log2(width/32)-1 downto log2(RAMblock_maxwidth/32)) = conv_std_logic_vector(i,RAMselect_aw) then
          if operand_addr(log2(width/32)-1 downto log2(RAMblock_maxwidth/32)) = conv_std_logic_vector(i,RAMselect_aw) then
            weA_RAM(i) <= write_operand_i;
            weA_RAM(i) <= write_operand_i;
          else
          else
            weA_RAM(i) <= '0';
            weA_RAM(i) <= '0';
Line 218... Line 218...
          weB   => write_result,
          weB   => write_result,
          dinB  => result_in(width-1 downto i*RAMblock_maxwidth),
          dinB  => result_in(width-1 downto i*RAMblock_maxwidth),
          doutB => operand_out(width-1 downto i*RAMblock_maxwidth)
          doutB => operand_out(width-1 downto i*RAMblock_maxwidth)
        );
        );
        -- weA, weB part
        -- weA, weB part
        process (write_operand_i, write_result, operand_addr)
        process (write_operand_i, operand_addr)
        begin
        begin
          if operand_addr(log2(width/32)-1 downto log2(RAMblock_maxwidth/32)) = conv_std_logic_vector(i,RAMselect_aw) then
          if operand_addr(log2(width/32)-1 downto log2(RAMblock_maxwidth/32)) = conv_std_logic_vector(i,RAMselect_aw) then
            weA_part <= write_operand_i;
            weA_part <= write_operand_i;
          else
          else
            weA_part <= '0';
            weA_part <= '0';

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