URL https://opencores.org/ocsvn/mod_sim_exp/mod_sim_exp/trunk

Subversion Repositories mod_sim_exp

[/] [mod_sim_exp/] [trunk/] [rtl/] [vhdl/] [interface/] [axi/] [msec_ipcore_axilite.vhd] - Diff between revs 85 and 86

Rev 85	Rev 86
Line 302...	Line 302...

`-- interrupt and flags`	`-- interrupt and flags`
`core_interrupt <= core_ready or core_mem_collision or core_fifo_full or core_fifo_nopush;`	`core_interrupt <= core_ready or core_mem_collision or core_fifo_full or core_fifo_nopush;`
`IntrEvent <= core_interrupt;`	`IntrEvent <= core_interrupt;`

`FLAGS_CNTRL_PROC : process(S_AXI_ACLK, S_AXI_ARESETN) is`	`FLAGS_CNTRL_PROC : process(S_AXI_ACLK, reset) is`
`begin`	`begin`
`if reset = '1' then`	`if reset = '1' then`
`core_flags <= (others => '0');`	`core_flags <= (others => '0');`
`load_flags <= '0';`	`load_flags <= '0';`
`elsif rising_edge(S_AXI_ACLK) then`	`elsif rising_edge(S_AXI_ACLK) then`