URL
https://opencores.org/ocsvn/openrisc/openrisc/trunk
Go to most recent revision |
Show entire file |
Details |
Blame |
View Log
Rev 790 |
Rev 791 |
Line 70... |
Line 70... |
.extern cyg_hal_invoke_constructors
|
.extern cyg_hal_invoke_constructors
|
.extern _cyg_instrument
|
.extern _cyg_instrument
|
.extern cyg_start
|
.extern cyg_start
|
.extern _hal_IRQ_init
|
.extern _hal_IRQ_init
|
.extern hal_platform_init
|
.extern hal_platform_init
|
.extern _initialize_stub
|
.extern initialize_stub
|
|
|
.extern __bss_start
|
.extern __bss_start
|
.extern __bss_end
|
.extern __bss_end
|
.extern __sbss_start
|
.extern __sbss_start
|
.extern __sbss_end
|
.extern __sbss_end
|
Line 337... |
Line 337... |
# Run platform-specific hardware initialization code.
|
# Run platform-specific hardware initialization code.
|
# This may include memory controller initialization.
|
# This may include memory controller initialization.
|
# Hence, it is not safe to access RAM until after this point.
|
# Hence, it is not safe to access RAM until after this point.
|
#hal_hardware_init
|
#hal_hardware_init
|
|
|
#undef CYGSEM_HAL_ENABLE_ICACHE_ON_STARTUP
|
#if defined(CYGSEM_HAL_ENABLE_ICACHE_ON_STARTUP) && defined(HAL_ICACHE_SIZE)
|
#ifdef CYGSEM_HAL_ENABLE_ICACHE_ON_STARTUP
|
|
# Enable I-Cache
|
# Enable I-Cache
|
hal_icache_init
|
hal_icache_init
|
#endif
|
#endif
|
|
|
#undef CYGSEM_HAL_ENABLE_DCACHE_ON_STARTUP
|
#if defined(CYGSEM_HAL_ENABLE_DCACHE_ON_STARTUP) && defined(HAL_DCACHE_SIZE)
|
#ifdef CYGSEM_HAL_ENABLE_DCACHE_ON_STARTUP
|
|
# Enable D-Cache
|
# Enable D-Cache
|
hal_dcache_init
|
hal_dcache_init
|
#endif
|
#endif
|
|
|
# Start the tick timer, in case timer polling routine hal_delay_us() is called.
|
# Start the tick timer, in case timer polling routine hal_delay_us() is called.
|
Line 424... |
Line 422... |
# call c++ constructors
|
# call c++ constructors
|
l.jal cyg_hal_invoke_constructors
|
l.jal cyg_hal_invoke_constructors
|
l.nop # delay slot
|
l.nop # delay slot
|
|
|
#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
|
#ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
|
l.jal _initialize_stub
|
l.jal initialize_stub
|
l.nop # delay slot
|
l.nop # delay slot
|
#endif
|
#endif
|
|
|
#if defined(CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT) \
|
#if defined(CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT) \
|
|| defined(CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT)
|
|| defined(CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT)
|
© copyright 1999-2025
OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.