URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [ecos-3.0/] [packages/] [hal/] [openrisc/] [orpsoc/] [current/] [include/] [pkgconf/] [mlt_openrisc_orpsoc_ram.h] - Diff between revs 786 and 791

Rev 786	Rev 791
Line 4...	Line 4...
`#include <cyg/infra/cyg_type.h>`	`#include <cyg/infra/cyg_type.h>`
`#include <stddef.h>`	`#include <stddef.h>`

`#endif`	`#endif`
`#define CYGMEM_REGION_ram (0)`	`#define CYGMEM_REGION_ram (0)`
`#define CYGMEM_REGION_ram_SIZE (0x00400000)`	`#define CYGMEM_REGION_ram_SIZE (CYGHWR_RAM_SIZE)`
`#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R \| CYGMEM_REGION_ATTR_W)`	`#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R \| CYGMEM_REGION_ATTR_W)`
`#define CYGMEM_REGION_rom (0xf0000000)`	`#define CYGMEM_REGION_rom (0xf0000000)`
`#define CYGMEM_REGION_rom_SIZE (0x10000000)`	`#define CYGMEM_REGION_rom_SIZE (CYGHWR_ROM_SIZE)`
`#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_R)`	`#define CYGMEM_REGION_rom_ATTR (CYGMEM_REGION_ATTR_R)`

`#if 0`	`#if 0`
`#ifndef __ASSEMBLER__`	`#ifndef __ASSEMBLER__`
`extern char CYG_LABEL_NAME (__reserved_vectors) [];`	`extern char CYG_LABEL_NAME (__reserved_vectors) [];`