Main Page Modules Related Pages
-
Overview
-
The Data Address Calculation Unit offers a unified read and write access over the concatenated RF, IOF and DM space, that is, over the Unified Memory (UM) space.
Loads and stores operate in the UM space. They use the DACU in order to translate the Unified Memory address into a RF, IOF or DM address.
The DACU takes requests to read or write into UM space, translates the UM address into RF, IOF or DM address, and transparently places requests to read or write the specific hardware resource (RF, IOF or DM) that corresponds to the given UM address.
-
Reading DACU
-
DACU read requests:
- pavr_s5_x_dacurd_rq
Needed by loads from address given by X pointer register. - pavr_s5_y_dacurd_rq
Needed by loads from address given by Y pointer register. - pavr_s5_z_dacurd_rq
Needed by loads from address given by Z pointer register. - pavr_s5_sp_dacurd_rq
Needed by POP instruction. - pavr_s5_k16_dacurd_rq
Needed by LDS instruction.
If the controller has more than 64KB of Data Memory, the Unified Memory address is built by concatenating the RAMPD with the 16 bit constant. - pavr_s5_pchi8_dacurd_rq
The higher 8 bits of the PC are loaded from the stack.
Needed by RET and RETI instructions. - pavr_s51_pcmid8_dacurd_rq
The middle 8 bits of the PC are loaded from the stack.
Needed by RET and RETI instructions. - pavr_s52_pclo8_dacurd_rq
The lower 8 bits of the PC are loaded from the stack.
Needed by RET and RETI instructions.
As a response to read requests, the DACU places read requests to RF, IOF or DM:
- pavr_s5_dacu_rfrd1_rq
- pavr_s5_dacu_iof_rq
- pavr_s5_dacu_dmrd_rq
-
Writing DACU
-
DACU write requests:
- pavr_s5_x_dacuwr_rq
Needed by stores to address given by X pointer register. - pavr_s5_y_dacuwr_rq
Needed by stores to address given by Y pointer register. - pavr_s5_z_dacuwr_rq
Needed by stores to address given by Z pointer register. - pavr_s5_sp_dacuwr_rq
Needed by PUSH instruction.
- pavr_s5_k16_dacuwr_rq
Needed by STS instruction.
If the controller has more than 64KB of Data Memory, the Unified Memory address is built by concatenating the RAMPD with the 16 bit constant. - pavr_s5_pclo8_dacuwr_rq
The lower 8 bits of the PC are stored on the stack.
Needed by CALL family instructions (CALL, RCALL, ICALL, EICALL, implicit interrupt CALL). - pavr_s51_pcmid8_dacuwr_rq
The middle 8 bits of the PC are stored on the stack.
Needed by CALL family instructions. - pavr_s52_pchi8_dacuwr_rq
The higher 8 bits of the PC are stored on the stack.
Needed by CALL family instructions.
As a response to write requests, the DACU places write requests to RF, IOF or DM, and BPU:
- pavr_s5_dacu_rfwr_rq
- pavr_s5_dacu_iof_rq
- pavr_s5_dacu_dmwr_rq
- pavr_s5_dacust_bpr0wr_rq
Generated on Tue Dec 31 20:26:31 2002 for Pipelined AVR microcontroller by
1.2.16