//////////////////////////////////////////////////////////////////////
|
//////////////////////////////////////////////////////////////////////
|
//// ////
|
//// ////
|
//// Copyright (C) 2017 Authors and OPENCORES.ORG ////
|
//// Copyright (C) 2017 Authors and OPENCORES.ORG ////
|
//// ////
|
//// ////
|
//// This source file may be used and distributed without ////
|
//// This source file may be used and distributed without ////
|
//// restriction provided that this copyright statement is not ////
|
//// restriction provided that this copyright statement is not ////
|
//// removed from the file and that any derivative work contains ////
|
//// removed from the file and that any derivative work contains ////
|
//// the original copyright notice and the associated disclaimer. ////
|
//// the original copyright notice and the associated disclaimer. ////
|
//// ////
|
//// ////
|
//// This source file is free software; you can redistribute it ////
|
//// This source file is free software; you can redistribute it ////
|
//// and/or modify it under the terms of the GNU Lesser General ////
|
//// and/or modify it under the terms of the GNU Lesser General ////
|
//// Public License as published by the Free Software Foundation; ////
|
//// Public License as published by the Free Software Foundation; ////
|
//// either version 2.1 of the License, or (at your option) any ////
|
//// either version 2.1 of the License, or (at your option) any ////
|
//// later version. ////
|
//// later version. ////
|
//// ////
|
//// ////
|
//// This source is distributed in the hope that it will be ////
|
//// This source is distributed in the hope that it will be ////
|
//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
|
//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
|
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
|
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
|
//// PURPOSE. See the GNU Lesser General Public License for more ////
|
//// PURPOSE. See the GNU Lesser General Public License for more ////
|
//// details. ////
|
//// details. ////
|
//// ////
|
//// ////
|
//// You should have received a copy of the GNU Lesser General ////
|
//// You should have received a copy of the GNU Lesser General ////
|
//// Public License along with this source; if not, download it ////
|
//// Public License along with this source; if not, download it ////
|
//// from http://www.opencores.org/lgpl.shtml ////
|
//// from http://www.opencores.org/lgpl.shtml ////
|
//// ////
|
//// ////
|
//////////////////////////////////////////////////////////////////////
|
//////////////////////////////////////////////////////////////////////
|
|
|
module
|
module
|
riffa_chnl_tx_fsm
|
riffa_chnl_tx_fsm
|
(
|
(
|
input tx_ready,
|
input tx_ready,
|
output tx,
|
output tx,
|
|
output acked,
|
input tx_ack,
|
input tx_ack,
|
input tx_done,
|
input tx_done,
|
|
|
input reset,
|
input reset,
|
input clk
|
input clk
|
);
|
);
|
|
|
//---------------------------------------------------
|
//---------------------------------------------------
|
// state machine binary definitions
|
// state machine binary definitions
|
enum reg [3:0]
|
enum reg [3:0]
|
{
|
{
|
IDLE = 4'b0001,
|
IDLE = 4'b0001,
|
ACK = 4'b0010,
|
ACK = 4'b0010,
|
TX = 4'b0100,
|
TX = 4'b0100,
|
ERROR = 4'b1000
|
ERROR = 4'b1000
|
} state, next_state;
|
} state, next_state;
|
|
|
|
|
//---------------------------------------------------
|
//---------------------------------------------------
|
// state machine flop
|
// state machine flop
|
always_ff @(posedge clk)
|
always_ff @(posedge clk)
|
if(reset)
|
if(reset)
|
state <= IDLE;
|
state <= IDLE;
|
else
|
else
|
state <= next_state;
|
state <= next_state;
|
|
|
|
|
//---------------------------------------------------
|
//---------------------------------------------------
|
// state machine
|
// state machine
|
always_comb
|
always_comb
|
case(state)
|
case(state)
|
IDLE: if(tx_ready)
|
IDLE: if(tx_ready)
|
next_state <= ACK;
|
next_state <= ACK;
|
else
|
else
|
next_state <= IDLE;
|
next_state <= IDLE;
|
|
|
ACK: if(tx_ack)
|
ACK: if(tx_ack)
|
next_state <= TX;
|
next_state <= TX;
|
else
|
else
|
next_state <= ACK;
|
next_state <= ACK;
|
|
|
TX: if(~tx_done)
|
TX: if(~tx_done)
|
next_state <= TX;
|
next_state <= TX;
|
else
|
else
|
next_state <= IDLE;
|
next_state <= IDLE;
|
|
|
ERROR: next_state <= IDLE;
|
ERROR: next_state <= IDLE;
|
|
|
default: next_state <= ERROR;
|
default: next_state <= ERROR;
|
|
|
endcase
|
endcase
|
|
|
|
|
// --------------------------------------------------------------------
|
// --------------------------------------------------------------------
|
//
|
//
|
assign tx = (state == ACK) | (state == TX);
|
assign tx = (state == ACK) | (state == TX);
|
|
assign acked = (state == TX) | (next_state == TX);
|
|
|
|
|
// --------------------------------------------------------------------
|
// --------------------------------------------------------------------
|
//
|
//
|
endmodule
|
endmodule
|
|
|
|
|
