//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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//// ////
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//// ////
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//// Copyright (C) 2017 Authors and OPENCORES.ORG ////
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//// Copyright (C) 2017 Authors and OPENCORES.ORG ////
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//// ////
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//// ////
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//// This source file may be used and distributed without ////
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//// This source file may be used and distributed without ////
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//// restriction provided that this copyright statement is not ////
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//// restriction provided that this copyright statement is not ////
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//// removed from the file and that any derivative work contains ////
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//// removed from the file and that any derivative work contains ////
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//// the original copyright notice and the associated disclaimer. ////
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//// the original copyright notice and the associated disclaimer. ////
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//// ////
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//// ////
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//// This source file is free software; you can redistribute it ////
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//// This source file is free software; you can redistribute it ////
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//// and/or modify it under the terms of the GNU Lesser General ////
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//// and/or modify it under the terms of the GNU Lesser General ////
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//// Public License as published by the Free Software Foundation; ////
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//// Public License as published by the Free Software Foundation; ////
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//// either version 2.1 of the License, or (at your option) any ////
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//// either version 2.1 of the License, or (at your option) any ////
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//// later version. ////
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//// later version. ////
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//// ////
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//// ////
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//// This source is distributed in the hope that it will be ////
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//// This source is distributed in the hope that it will be ////
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//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
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//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
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//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
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//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
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//// PURPOSE. See the GNU Lesser General Public License for more ////
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//// PURPOSE. See the GNU Lesser General Public License for more ////
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//// details. ////
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//// details. ////
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//// ////
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//// ////
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//// You should have received a copy of the GNU Lesser General ////
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//// You should have received a copy of the GNU Lesser General ////
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//// Public License along with this source; if not, download it ////
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//// Public License along with this source; if not, download it ////
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//// from http://www.opencores.org/lgpl.shtml ////
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//// from http://www.opencores.org/lgpl.shtml ////
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//// ////
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//// ////
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//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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module
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module
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axis_catenate
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axis_catenate
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#(
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#(
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N, // data bus width in bytes
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N, // data bus width in bytes
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I = 1, // TID width
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I = 1, // TID width
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D = 1, // TDEST width
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D = 1, // TDEST width
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U = 1, // TUSER width
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U = 1, // TUSER width
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U_IS_EOP = -1
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U_IS_EOP = -1
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)
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)
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(
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(
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axis_if axis_in [1:0],
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axis_if axis_in [1:0],
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axis_if axis_out,
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axis_if axis_out,
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input aclk,
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input aclk,
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input aresetn
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input aresetn
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);
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);
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// --------------------------------------------------------------------
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// --------------------------------------------------------------------
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//
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//
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wire select;
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wire select;
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wire axis_eop;
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wire axis_eop;
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defparam axis_eop_mux_i.U_IS_EOP = U_IS_EOP; // why are needed these for recursive modules?
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defparam axis_eop_mux_i.U_IS_EOP = U_IS_EOP; // why are these needed for recursive modules?
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defparam axis_eop_mux_i.MA = 1;
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defparam axis_eop_mux_i.MA = 1;
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axis_eop_mux
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axis_eop_mux
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// axis_eop_mux #(.U_IS_EOP(U_IS_EOP), .MA(1))
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// axis_eop_mux #(.U_IS_EOP(U_IS_EOP), .MA(1))
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axis_eop_mux_i(.axis_in(axis_in), .*);
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axis_eop_mux_i(.axis_in(axis_in), .*);
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// --------------------------------------------------------------------
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// --------------------------------------------------------------------
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// state machine binary definitions
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// state machine binary definitions
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enum reg [1:0]
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enum reg [1:0]
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{
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{
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HEAD = 2'b01,
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HEAD = 2'b01,
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TAIL = 2'b10
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TAIL = 2'b10
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} state, next_state;
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} state, next_state;
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// --------------------------------------------------------------------
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// --------------------------------------------------------------------
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// state machine flop
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// state machine flop
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always_ff @(posedge aclk)
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always_ff @(posedge aclk)
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if(~aresetn)
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if(~aresetn)
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state <= HEAD;
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state <= HEAD;
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else
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else
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state <= next_state;
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state <= next_state;
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// --------------------------------------------------------------------
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// --------------------------------------------------------------------
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// state machine
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// state machine
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always_comb
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always_comb
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case(state)
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case(state)
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HEAD: if(axis_eop)
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HEAD: if(axis_eop)
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next_state <= TAIL;
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next_state <= TAIL;
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else
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else
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next_state <= HEAD;
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next_state <= HEAD;
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TAIL: if(axis_eop)
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TAIL: if(axis_eop)
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next_state <= HEAD;
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next_state <= HEAD;
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else
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else
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next_state <= TAIL;
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next_state <= TAIL;
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default: next_state <= HEAD;
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default: next_state <= HEAD;
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endcase
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endcase
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// --------------------------------------------------------------------
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// --------------------------------------------------------------------
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//
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//
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axis_if #(.N(N), .I(I), .D(D), .U(U)) axis_bus[1:0](.*);
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axis_if #(.N(N), .I(I), .D(D), .U(U)) axis_bus[1:0](.*);
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genvar j;
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genvar j;
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generate
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generate
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if(U_IS_EOP > -1)
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if(U_IS_EOP > -1)
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begin: u_is_eop_gen
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begin: u_is_eop_gen
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for(j = 0; j < U; j++)
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for(j = 0; j < U; j++)
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begin: for_tuser_gen
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begin: for_tuser_gen
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if(j == U_IS_EOP)
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if(j == U_IS_EOP)
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begin: choped_tuser_gen
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begin: choped_tuser_gen
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assign axis_bus[0].tuser[j] = 0;
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assign axis_bus[0].tuser[j] = 0;
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end
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end
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else
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else
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begin: tuser_gen
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begin: tuser_gen
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assign axis_bus[0].tuser[j] = axis_in[0].tuser[j];
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assign axis_bus[0].tuser[j] = axis_in[0].tuser[j];
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end
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end
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end
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end
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end
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end
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else
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else
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if(U_IS_EOP > -1)
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if(U_IS_EOP > -1)
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begin: tlast_gen
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begin: tlast_gen
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assign axis_bus[0].tlast = axis_in[0].tlast;
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assign axis_bus[0].tlast = axis_in[0].tlast;
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end
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end
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else
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else
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begin: choped_tlast_gen
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begin: choped_tlast_gen
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assign axis_bus[0].tlast = 0;
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assign axis_bus[0].tlast = 0;
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end
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end
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endgenerate
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endgenerate
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// --------------------------------------------------------------------
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// --------------------------------------------------------------------
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//
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//
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assign axis_in[0].tready = axis_bus[0].tready;
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assign axis_in[0].tready = axis_bus[0].tready;
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assign axis_bus[0].tvalid = axis_in[0].tvalid;
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assign axis_bus[0].tvalid = axis_in[0].tvalid;
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assign axis_bus[0].tdata = axis_in[0].tdata;
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assign axis_bus[0].tdata = axis_in[0].tdata;
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assign axis_bus[0].tstrb = axis_in[0].tstrb;
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assign axis_bus[0].tstrb = axis_in[0].tstrb;
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assign axis_bus[0].tkeep = axis_in[0].tkeep;
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assign axis_bus[0].tkeep = axis_in[0].tkeep;
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assign axis_bus[0].tid = axis_in[0].tid;
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assign axis_bus[0].tid = axis_in[0].tid;
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assign axis_bus[0].tdest = axis_in[0].tdest;
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assign axis_bus[0].tdest = axis_in[0].tdest;
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// --------------------------------------------------------------------
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// --------------------------------------------------------------------
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//
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//
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axis_alias
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axis_alias
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axis_alias_i(axis_in[1], axis_bus[1]);
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axis_alias_i(axis_in[1], axis_bus[1]);
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// --------------------------------------------------------------------
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// --------------------------------------------------------------------
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//
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//
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defparam axis_mux_i.N = N; // why are needed these for recursive modules?
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defparam axis_mux_i.N = N; // why are these needed for recursive modules?
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defparam axis_mux_i.I = I;
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defparam axis_mux_i.I = I;
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defparam axis_mux_i.D = D;
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defparam axis_mux_i.D = D;
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defparam axis_mux_i.U = U;
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defparam axis_mux_i.U = U;
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axis_mux
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axis_mux
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// axis_mux #(.N(N), .I(I), .D(D), .U(U))
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// axis_mux #(.N(N), .I(I), .D(D), .U(U))
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axis_mux_i(.axis_in(axis_bus), .*);
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axis_mux_i(.axis_in(axis_bus), .*);
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// --------------------------------------------------------------------
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// --------------------------------------------------------------------
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//
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//
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assign select = (state == HEAD) ? 0 : 1;
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assign select = (state == HEAD) ? 0 : 1;
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// --------------------------------------------------------------------
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// --------------------------------------------------------------------
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//
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//
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endmodule
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endmodule
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