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//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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//// ////
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//// ////
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//// Copyright (C) 2015 Authors and OPENCORES.ORG ////
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//// Copyright (C) 2016 Authors and OPENCORES.ORG ////
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//// ////
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//// ////
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//// This source file may be used and distributed without ////
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//// This source file may be used and distributed without ////
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//// restriction provided that this copyright statement is not ////
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//// restriction provided that this copyright statement is not ////
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//// removed from the file and that any derivative work contains ////
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//// removed from the file and that any derivative work contains ////
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//// the original copyright notice and the associated disclaimer. ////
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//// the original copyright notice and the associated disclaimer. ////
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//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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module
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module
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axis_map_fifo
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axis_map_fifo
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#(
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#(
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N = 8, // data bus width in bytes
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N, // data bus width in bytes
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I = 0, // TID width
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I = 0, // TID width
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D = 0, // TDEST width
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D = 0, // TDEST width
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U = 1, // TUSER width
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U = 1, // TUSER width
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USE_TSTRB = 0, // set to 1 to enable, 0 to disable
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USE_TSTRB = 0, // set to 1 to enable, 0 to disable
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USE_TKEEP = 0, // set to 1 to enable, 0 to disable
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USE_TKEEP = 0, // set to 1 to enable, 0 to disable
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