# //////////////////////////////////////////////////////////////////////
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# //////////////////////////////////////////////////////////////////////
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# //// ////
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# //// ////
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# //// Copyright (C) 2015 Authors and OPENCORES.ORG ////
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# //// Copyright (C) 2015 Authors and OPENCORES.ORG ////
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# //// ////
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# //// ////
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# //// This source file may be used and distributed without ////
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# //// This source file may be used and distributed without ////
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# //// restriction provided that this copyright statement is not ////
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# //// restriction provided that this copyright statement is not ////
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# //// removed from the file and that any derivative work contains ////
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# //// removed from the file and that any derivative work contains ////
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# //// the original copyright notice and the associated disclaimer. ////
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# //// the original copyright notice and the associated disclaimer. ////
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# //// ////
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# //// ////
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# //// This source file is free software; you can redistribute it ////
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# //// This source file is free software; you can redistribute it ////
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# //// and/or modify it under the terms of the GNU Lesser General ////
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# //// and/or modify it under the terms of the GNU Lesser General ////
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# //// Public License as published by the Free Software Foundation; ////
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# //// Public License as published by the Free Software Foundation; ////
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# //// either version 2.1 of the License, or (at your option) any ////
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# //// either version 2.1 of the License, or (at your option) any ////
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# //// later version. ////
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# //// later version. ////
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# //// ////
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# //// ////
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# //// This source is distributed in the hope that it will be ////
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# //// This source is distributed in the hope that it will be ////
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# //// useful, but WITHOUT ANY WARRANTY; without even the implied ////
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# //// useful, but WITHOUT ANY WARRANTY; without even the implied ////
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# //// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
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# //// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
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# //// PURPOSE. See the GNU Lesser General Public License for more ////
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# //// PURPOSE. See the GNU Lesser General Public License for more ////
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# //// details. ////
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# //// details. ////
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# //// ////
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# //// ////
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# //// You should have received a copy of the GNU Lesser General ////
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# //// You should have received a copy of the GNU Lesser General ////
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# //// Public License along with this source; if not, download it ////
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# //// Public License along with this source; if not, download it ////
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# //// from http://www.opencores.org/lgpl.shtml ////
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# //// from http://www.opencores.org/lgpl.shtml ////
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# //// ////
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# //// ////
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# //////////////////////////////////////////////////////////////////////
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# //////////////////////////////////////////////////////////////////////
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# ------------------------------------
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# ------------------------------------
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#
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#
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proc sim_compile_lib {lib target} {
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proc sim_compile_lib {lib target} {
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global env
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global env
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echo "INFO: compiling $target rtl"
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echo "INFO: compiling $target rtl"
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foreach filename [glob -nocomplain -directory ${lib}/sim/libs/${target}_verilog/ *.f] {
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foreach filename [glob -nocomplain -directory ${lib}/sim/libs/${target}_verilog/ *.f] {
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echo "INFO: compiling $filename"
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echo "INFO: compiling $filename"
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vlog -f $filename
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vlog -f $filename
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}
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}
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foreach filename [glob -nocomplain -directory ${lib}/sim/libs/${target}_VHDL/ *.f] {
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foreach filename [glob -nocomplain -directory ${lib}/sim/libs/${target}_VHDL/ *.f] {
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echo "INFO: compiling $filename"
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echo "INFO: compiling $filename"
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vcom -explicit -f $filename
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vcom -explicit -f $filename
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}
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}
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}
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}
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# ------------------------------------
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# ------------------------------------
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#
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#
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proc sim_compile_all { target } {
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proc sim_compile_all { target } {
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global env
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global env
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echo "INFO: compiling $target rtl"
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echo "INFO: compiling $target rtl"
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foreach filename [glob -nocomplain -directory ../../libs/${target}_verilog/ *.f] {
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foreach filename [glob -nocomplain -directory ../../libs/${target}_verilog/ *.f] {
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echo "INFO: compiling $filename"
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echo "INFO: compiling $filename"
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vlog -f $filename
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vlog -f $filename
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}
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}
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foreach filename [glob -nocomplain -directory ../../libs/${target}_VHDL/ *.f] {
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foreach filename [glob -nocomplain -directory ../../libs/${target}_VHDL/ *.f] {
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echo "INFO: compiling $filename"
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echo "INFO: compiling $filename"
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vcom -explicit -f $filename
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vcom -explicit -f $filename
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}
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}
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}
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}
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# ------------------------------------
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# ------------------------------------
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#
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#
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proc sim_run_sim { } {
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proc sim_run_sim { } {
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if { [file exists ./pre_sim.do] } {
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echo "INFO: found ./pre_sim.do"
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do ./pre_sim.do
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}
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if {[file exists ./sim.do]} {
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if {[file exists ./sim.do]} {
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do ./sim.do
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do ./sim.do
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} elseif {[file exists ../../libs/sim.do]} {
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} elseif {[file exists ../../libs/sim.do]} {
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do ../../libs/sim.do
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do ../../libs/sim.do
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} elseif {[file exists ../../libs/altera_sim.f]} {
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} elseif {[file exists ../../libs/altera_sim.f]} {
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vsim -novopt -f ../../libs/altera_sim.f -l transcript.txt work.tb_top
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vsim -novopt -f ../../libs/altera_sim.f -l transcript.txt work.tb_top
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} elseif {[file exists ../../libs/xilinx_sim.f]} {
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} elseif {[file exists ../../libs/xilinx_sim.f]} {
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vsim -novopt -f ../../libs/xilinx_sim.f -l transcript.txt work.tb_top work.glbl
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vsim -novopt -f ../../libs/xilinx_sim.f -l transcript.txt work.tb_top work.glbl
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}
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}
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if { [file exists ./wave.do] } {
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if { [file exists ./wave.do] } {
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do ./wave.do
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do ./wave.do
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}
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}
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if { [file exists ./post_sim.do] } {
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echo "INFO: found ./post_sim.do"
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do ./post_sim.do
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}
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}
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}
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# ------------------------------------
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# ------------------------------------
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#
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#
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proc sim_run_test { } {
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proc sim_run_test { } {
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global env
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global env
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# unique setup
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# unique setup
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if { [file exists ./setup_test.do] } {
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if { [file exists ./setup_test.do] } {
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do ./setup_test.do
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do ./setup_test.do
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}
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}
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if { [info exists env(MAKEFILE_TEST_RUN)] } {
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if { [info exists env(MAKEFILE_TEST_RUN)] } {
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vlog +define+MAKEFILE_TEST_RUN ../../src/tb_top.v
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vlog +define+MAKEFILE_TEST_RUN ../../src/tb_top.v
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} else {
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} else {
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sim_run_sim
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sim_run_sim
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}
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}
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run -all
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run -all
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}
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}
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# ------------------------------------
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# ------------------------------------
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#
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#
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proc sim_restart { } {
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proc sim_restart { } {
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global env
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global env
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# work in progress files to compile
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# work in progress files to compile
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if { [file exists ./wip.do] } {
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if { [file exists ./wip.do] } {
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echo "INFO: found ./wip.do"
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echo "INFO: found ./wip.do"
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do ./wip.do
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do ./wip.do
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}
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}
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if { [file exists ./pre_sim.do] } {
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echo "INFO: found ./pre_sim.do"
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do ./pre_sim.do
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}
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if { [string equal nodesign [runStatus]] } {
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if { [string equal nodesign [runStatus]] } {
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sim_run_sim
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sim_run_sim
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} else {
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} else {
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restart -force
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restart -force
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}
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}
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run -all
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run -all
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echo "INFO: run -all done."
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if { [file exists ./post_sim.do] } {
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echo "INFO: found ./post_sim.do"
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do ./post_sim.do
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}
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}
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}
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# ------------------------------------
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# ------------------------------------
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#
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#
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proc make_lib { lib {rebuild 0} } {
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proc make_lib { lib {rebuild 0} } {
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if {[file exists $lib/_info]} {
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if {[file exists $lib/_info]} {
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echo "INFO: Simulation library $lib already exists"
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echo "INFO: Simulation library $lib already exists"
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if { $rebuild != 0 } {
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if { $rebuild != 0 } {
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echo "INFO: Rebuilding library. Deleting ./$lib and recompiling all"
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echo "INFO: Rebuilding library. Deleting ./$lib and recompiling all"
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quit -sim
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quit -sim
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file delete -force ./$lib
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file delete -force ./$lib
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vlib $lib
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vlib $lib
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vmap $lib $lib
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vmap $lib $lib
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}
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}
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} else {
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} else {
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vlib $lib
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vlib $lib
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vmap $lib $lib
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vmap $lib $lib
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}
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}
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}
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}
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