| Line 142... |
Line 142... |
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initial o_cmd_accepted = 1'b0;
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initial o_cmd_accepted = 1'b0;
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always @(posedge i_clk_200mhz)
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always @(posedge i_clk_200mhz)
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o_cmd_accepted=((i_wb_data_stb)||(i_wb_ctrl_stb))&&(~o_wb_stall);
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o_cmd_accepted=((i_wb_data_stb)||(i_wb_ctrl_stb))&&(~o_wb_stall);
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//
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//
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// llqspi
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// lleqspi
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//
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//
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// Providing the low-level SPI interface
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// Providing the low-level SPI interface
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//
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//
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reg spi_wr, spi_hold, spi_spd, spi_dir, spi_recycle;
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reg spi_wr, spi_hold, spi_spd, spi_dir, spi_recycle;
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reg [31:0] spi_word;
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reg [31:0] spi_word;
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reg [1:0] spi_len;
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reg [1:0] spi_len;
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wire [31:0] spi_out;
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wire [31:0] spi_out;
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wire spi_valid, spi_busy, spi_stopped;
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wire spi_valid, spi_busy, spi_stopped;
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llqspi lowlvl(i_clk_200mhz, spi_wr, spi_hold, spi_word, spi_len,
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lleqspi lowlvl(i_clk_200mhz, spi_wr, spi_hold, spi_word, spi_len,
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spi_spd, spi_dir, spi_recycle, spi_out, spi_valid, spi_busy,
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spi_spd, spi_dir, spi_recycle, spi_out, spi_valid, spi_busy,
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o_qspi_sck, o_qspi_cs_n, o_qspi_mod, o_qspi_dat, i_qspi_dat);
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o_qspi_sck, o_qspi_cs_n, o_qspi_mod, o_qspi_dat, i_qspi_dat);
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assign spi_stopped = (o_qspi_cs_n)&&(~spi_busy)&&(~spi_wr);
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assign spi_stopped = (o_qspi_cs_n)&&(~spi_busy)&&(~spi_wr);
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| Line 1252... |
Line 1252... |
r_ctdat_len <= 1'b0; // 8-bit data
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r_ctdat_len <= 1'b0; // 8-bit data
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end
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end
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endcase
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endcase
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end
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end
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assign o_quad = 1'b0;
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assign o_quad = 1'b1;
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reg nxt_data_ack;
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reg nxt_data_ack;
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// Second step, actually drive the state machine
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// Second step, actually drive the state machine
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initial ctstate = `CT_IDLE;
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initial ctstate = `CT_IDLE;
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