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///////////////////////////////////////////////////////////////////////////
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////////////////////////////////////////////////////////////////////////////////
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//
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//
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// Filename: llqspi.v
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// Filename: llqspi.v
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//
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//
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// Project: Wishbone Controlled Quad SPI Flash Controller
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// Project: Wishbone Controlled Quad SPI Flash Controller
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//
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//
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// to/from a Quad SPI port. The port is understood to be
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// to/from a Quad SPI port. The port is understood to be
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// a normal SPI port unless the driver requests four bit mode.
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// a normal SPI port unless the driver requests four bit mode.
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// When not in use, unlike our previous SPI work, no bits will
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// When not in use, unlike our previous SPI work, no bits will
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// toggle.
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// toggle.
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//
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//
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// Creator: Dan Gisselquist
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// Creator: Dan Gisselquist, Ph.D.
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// Gisselquist Technology, LLC
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// Gisselquist Technology, LLC
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//
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//
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///////////////////////////////////////////////////////////////////////////
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////////////////////////////////////////////////////////////////////////////////
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//
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//
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// Copyright (C) 2015, Gisselquist Technology, LLC
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// Copyright (C) 2015,2017, Gisselquist Technology, LLC
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//
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//
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// This program is free software (firmware): you can redistribute it and/or
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// This program is free software (firmware): you can redistribute it and/or
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// modify it under the terms of the GNU General Public License as published
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// modify it under the terms of the GNU General Public License as published
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// by the Free Software Foundation, either version 3 of the License, or (at
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// by the Free Software Foundation, either version 3 of the License, or (at
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// your option) any later version.
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// your option) any later version.
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// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
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// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
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// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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// for more details.
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// for more details.
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//
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//
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// You should have received a copy of the GNU General Public License along
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// You should have received a copy of the GNU General Public License along
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// with this program. (It's in the $(ROOT)/doc directory, run make with no
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// with this program. (It's in the $(ROOT)/doc directory. Run make with no
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// target there if the PDF file isn't present.) If not, see
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// target there if the PDF file isn't present.) If not, see
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// <http://www.gnu.org/licenses/> for a copy.
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// <http://www.gnu.org/licenses/> for a copy.
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//
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//
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// License: GPL, v3, as defined and found on www.gnu.org,
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// License: GPL, v3, as defined and found on www.gnu.org,
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// http://www.gnu.org/licenses/gpl.html
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// http://www.gnu.org/licenses/gpl.html
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//
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//
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//
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//
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///////////////////////////////////////////////////////////////////////////
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////////////////////////////////////////////////////////////////////////////////
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//
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//
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//
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//
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`default_nettype none
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`default_nettype none
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//
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//
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`define QSPI_IDLE 3'h0
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`define QSPI_IDLE 3'h0
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initial o_cs_n = 1'b1;
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initial o_cs_n = 1'b1;
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initial o_dat = 4'hd;
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initial o_dat = 4'hd;
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initial o_valid = 1'b0;
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initial o_valid = 1'b0;
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initial o_busy = 1'b0;
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initial o_busy = 1'b0;
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initial r_input = 31'h000;
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initial r_input = 31'h000;
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initial o_mod = `QSPI_MOD_SPI;
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always @(posedge i_clk)
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always @(posedge i_clk)
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if ((state == `QSPI_IDLE)&&(o_sck))
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if ((state == `QSPI_IDLE)&&(o_sck))
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begin
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begin
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o_cs_n <= 1'b1;
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o_cs_n <= 1'b1;
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o_valid <= 1'b0;
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o_valid <= 1'b0;
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o_busy <= 1'b0;
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o_busy <= 1'b0;
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o_mod <= `QSPI_MOD_SPI;
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o_mod <= `QSPI_MOD_SPI;
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if (i_wr)
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begin
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r_word <= i_word;
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r_word <= i_word;
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state <= `QSPI_START;
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r_spd <= i_spd;
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r_spd <= i_spd;
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r_dir <= i_dir;
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r_dir <= i_dir;
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if (i_wr)
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begin
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state <= `QSPI_START;
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spi_len<= { 1'b0, i_len, 3'b000 } + 6'h8;
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spi_len<= { 1'b0, i_len, 3'b000 } + 6'h8;
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o_cs_n <= 1'b0;
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o_cs_n <= 1'b0;
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// o_sck <= 1'b1;
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o_busy <= 1'b1;
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o_busy <= 1'b1;
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o_sck <= 1'b1;
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end
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end
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end else if (state == `QSPI_START)
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end else if (state == `QSPI_START)
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begin // We come in here with sck high, stay here 'til sck is low
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begin // We come in here with sck high, stay here 'til sck is low
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o_sck <= 1'b0;
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o_sck <= 1'b0;
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if (o_sck == 1'b0)
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if (o_sck == 1'b0)
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o_mod <= (r_spd) ? { 1'b1, r_dir } : `QSPI_MOD_SPI;
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o_mod <= (r_spd) ? { 1'b1, r_dir } : `QSPI_MOD_SPI;
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o_cs_n <= 1'b0;
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o_cs_n <= 1'b0;
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o_busy <= 1'b1;
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o_busy <= 1'b1;
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o_valid <= 1'b0;
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o_valid <= 1'b0;
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if (r_spd)
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if (r_spd)
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begin
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o_dat <= r_word[31:28];
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o_dat <= r_word[31:28];
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// r_word <= { r_word[27:0], 4'h0 };
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else
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end else begin
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o_dat <= { 3'b110, r_word[31] };
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o_dat <= { 3'b110, r_word[31] };
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// r_word <= { r_word[30:0], 1'b0 };
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end
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end else if (~o_sck)
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end else if (~o_sck)
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begin
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begin
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o_sck <= 1'b1;
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o_sck <= 1'b1;
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o_busy <= ((state != `QSPI_READY)||(~i_wr));
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o_busy <= ((state != `QSPI_READY)||(~i_wr));
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o_valid <= 1'b0;
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o_valid <= 1'b0;
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// This is the state on the last clock (both low and
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// This is the state on the last clock (both low and
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// high clocks) of the data. Data is valid during
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// high clocks) of the data. Data is valid during
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// this state. Here we chose to either STOP or
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// this state. Here we chose to either STOP or
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// continue and transmit more.
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// continue and transmit more.
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o_sck <= (i_hold); // No clocks while holding
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o_sck <= (i_hold); // No clocks while holding
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r_spd <= i_spd;
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r_dir <= i_dir;
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if (i_spd)
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begin
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r_word <= { i_word[27:0], 4'h0 };
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spi_len<= { 1'b0, i_len, 3'b000 } + 6'h8 - 6'h4;
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end else begin
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r_word <= { i_word[30:0], 1'b0 };
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spi_len<= { 1'b0, i_len, 3'b000 } + 6'h8 - 6'h1;
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end
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if((~o_busy)&&(i_wr))// Acknowledge a new request
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if((~o_busy)&&(i_wr))// Acknowledge a new request
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begin
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begin
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state <= `QSPI_BITS;
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state <= `QSPI_BITS;
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o_busy <= 1'b1;
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o_busy <= 1'b1;
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o_sck <= 1'b0;
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o_sck <= 1'b0;
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// Read the new request off the bus
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// Read the new request off the bus
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r_spd <= i_spd;
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r_dir <= i_dir;
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// Set up the first bits on the bus
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// Set up the first bits on the bus
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o_mod <= (i_spd) ? { 1'b1, i_dir } : `QSPI_MOD_SPI;
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o_mod <= (i_spd) ? { 1'b1, i_dir } : `QSPI_MOD_SPI;
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if (i_spd)
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if (i_spd)
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begin
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o_dat <= i_word[31:28];
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o_dat <= i_word[31:28];
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r_word <= { i_word[27:0], 4'h0 };
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else
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// spi_len <= spi_len - 4;
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spi_len<= { 1'b0, i_len, 3'b000 } + 6'h8
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- 6'h4;
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end else begin
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o_dat <= { 3'b110, i_word[31] };
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o_dat <= { 3'b110, i_word[31] };
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r_word <= { i_word[30:0], 1'b0 };
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spi_len<= { 1'b0, i_len, 3'b000 } + 6'h8
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- 6'h1;
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end
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// Read a bit upon any transition
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o_valid <= 1'b1;
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if (~o_mod[1])
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begin
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r_input <= { r_input[29:0], i_miso };
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o_word <= { r_input[30:0], i_miso };
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end else if (o_mod[1])
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begin
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r_input <= { r_input[26:0], i_dat };
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o_word <= { r_input[27:0], i_dat };
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end
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end else begin
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end else begin
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o_sck <= 1'b1;
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o_sck <= 1'b1;
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state <= (i_hold)?`QSPI_HOLDING : `QSPI_STOP;
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state <= (i_hold)?`QSPI_HOLDING : `QSPI_STOP;
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o_busy <= (~i_hold);
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o_busy <= (~i_hold);
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end
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// Read a bit upon any transition
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// Read a bit upon any transition
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o_valid <= 1'b1;
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o_valid <= 1'b1;
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if (~o_mod[1])
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if (~o_mod[1])
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begin
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begin
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end else if (o_mod[1])
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end else if (o_mod[1])
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begin
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begin
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r_input <= { r_input[26:0], i_dat };
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r_input <= { r_input[26:0], i_dat };
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o_word <= { r_input[27:0], i_dat };
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o_word <= { r_input[27:0], i_dat };
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end
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end
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end
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end else if (state == `QSPI_HOLDING)
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end else if (state == `QSPI_HOLDING)
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begin
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begin
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// We need this state so that the o_valid signal
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// We need this state so that the o_valid signal
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// can get strobed with our last result. Otherwise
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// can get strobed with our last result. Otherwise
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// we could just sit in READY waiting for a new command.
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// we could just sit in READY waiting for a new command.
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