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[/] [qspiflash/] [trunk/] [rtl/] [llqspi.v] - Diff between revs 4 and 7

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Rev 4 Rev 7
Line 74... Line 74...
        output  reg             o_cs_n;
        output  reg             o_cs_n;
        output  reg     [1:0]    o_mod;
        output  reg     [1:0]    o_mod;
        output  reg     [3:0]    o_dat;
        output  reg     [3:0]    o_dat;
        input           [3:0]    i_dat;
        input           [3:0]    i_dat;
 
 
 
        // output       wire    [22:0]  o_dbg;
 
        // assign       o_dbg = { state, spi_len,
 
                // o_busy, o_valid, o_cs_n, o_sck, o_mod, o_dat, i_dat };
 
 
        // Timing:
        // Timing:
        //
        //
        //      Tick    Clk     BSY/WR  CS_n    BIT/MO  STATE
        //      Tick    Clk     BSY/WR  CS_n    BIT/MO  STATE
        //       0      1       0/0     1        -      
        //       0      1       0/0     1        -      
        //       1      1       0/1     1        -
        //       1      1       0/1     1        -

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