URL
https://opencores.org/ocsvn/robust_axi_fabric/robust_axi_fabric/trunk
Go to most recent revision |
Show entire file |
Details |
Blame |
View Log
Rev 18 |
Rev 19 |
Line 45... |
Line 45... |
|
|
DEFINE.USER DEF_DECERR_SLV ##use interanl decode slave error
|
DEFINE.USER DEF_DECERR_SLV ##use interanl decode slave error
|
|
|
SWAP.USER USER_BITS 4 ##AXI user bits
|
SWAP.USER USER_BITS 4 ##AXI user bits
|
|
|
SWAP.USER ID_BITS 3 ##AXI ID bits
|
SWAP.USER MSTR_ID_BITS 4 ##AXI ID bits
|
|
|
GROUP.USER M0_ID is { ##Supported AXI IDs for master 0
|
UNDEF.USER UNIQUE_ID ##If defined all IDs must be unique, else bits will be added to slave IDs to identify masters
|
b000
|
|
b001
|
|
|
GROUP.USER M0_ID is { ##Supported AXI IDs for master 0 (binary)
|
|
000
|
|
001
|
}
|
}
|
GROUP.USER M1_ID is { ##Supported AXI IDs for master
|
GROUP.USER M1_ID is { ##Supported AXI IDs for master 1 (binary)
|
b011
|
011
|
}
|
}
|
GROUP.USER M2_ID is { ##Supported AXI IDs for master 2
|
GROUP.USER M2_ID is { ##Supported AXI IDs for master 2 (binary)
|
b101
|
000
|
|
100
|
|
101
|
}
|
}
|
|
|
No newline at end of file
|
No newline at end of file
|
© copyright 1999-2025
OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.