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[/] [s1_core/] [trunk/] [docs/] [SYNTHESIS.txt] - Diff between revs 105 and 111
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The scripts to run synthesis are similar to the ones
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The scripts to run synthesis are similar to the ones
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used for simulations, you can still use the free Icarus
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used for simulations, you can still use the free Icarus
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Verilog software (that will target an FPGA application)
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Verilog software (that will target an FPGA application)
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or a commercial Design Compiler tool from Synopsys (that
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or a commercial Design Compiler tool from Synopsys (that
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will be used for ASIC).
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will be used for ASIC). In addition there is also a good
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synthesis tool for FPGAs from Xilinx named XST (could be
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"Xilinx Synthesis Tool").
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To synthesize using XST:
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s1_synth xst
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With Icarus you will use the "fpga" target, to do so
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With Icarus you will use the "fpga" target, to do so
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just run:
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just run:
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build_fpga
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s1_synth fpga
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If you want to use Synopsys Design Compiler instead you
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If you want to use Synopsys Design Compiler instead you
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have to use:
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have to use:
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build_dc
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s1_synth dc
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Please note that the commercial tools are NOT supported, and
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Please note that the commercial tools are NOT supported, and
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they will probably not work unless you fix all the required
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they will probably not work unless you fix all the required
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parameters properly (we are focusing on free software since
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parameters properly (we are focusing on free software since
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we want to build up a community of developers around the S1).
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we want to build up a community of developers around the S1).
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The results for these two kinds of scripts are in the
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The results for these scripts are in the directories:
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directories:
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run/synth/xst/
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run/synth/fpga/
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run/synth/fpga/
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and
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run/synth/dc/
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run/synth/dc/
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