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[/] [s6soc/] [trunk/] [rtl/] [altbusmaster.v] - Diff between revs 13 and 25

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Line 42... Line 42...
`ifndef VERILATOR
`ifndef VERILATOR
`define FANCY_ICAP_ACCESS
`define FANCY_ICAP_ACCESS
`endif
`endif
`define FLASH_ACCESS
`define FLASH_ACCESS
`define DBG_SCOPE       // About 204 LUTs, at 2^6 addresses
`define DBG_SCOPE       // About 204 LUTs, at 2^6 addresses
 
// `define      COMPRESSED_SCOPE
 
`define INCLUDE_SECOND_TIMER
 
`define SECOND_TIMER_IS_WATCHDOG
`define INCLUDE_RTC     // About 90 LUTs
`define INCLUDE_RTC     // About 90 LUTs
 
`define FULL_BUSERR_CALCULATION
`define WBUBUS
`define WBUBUS
module  altbusmaster(i_clk, i_rst,
module  altbusmaster(i_clk, i_rst,
                // DEPP I/O Control
                // DEPP I/O Control
                i_depp_astb_n, i_depp_dstb_n, i_depp_write_n,
                i_depp_astb_n, i_depp_dstb_n, i_depp_write_n,
                        i_depp_data, o_depp_data, o_depp_wait,
                        i_depp_data, o_depp_data, o_depp_wait,
Line 165... Line 169...
                assign  wb_addr = w_wbu_addr;
                assign  wb_addr = w_wbu_addr;
        endgenerate
        endgenerate
 
 
        wire    io_sel, flash_sel, flctl_sel, scop_sel, cfg_sel, mem_sel,
        wire    io_sel, flash_sel, flctl_sel, scop_sel, cfg_sel, mem_sel,
                        rtc_sel, none_sel, many_sel;
                        rtc_sel, none_sel, many_sel;
        wire    flash_ack, scop_ack, cfg_ack, mem_ack;
        wire    flash_ack, scop_ack, cfg_ack, mem_ack, many_ack;
        wire    rtc_ack, rtc_stall;
        wire    rtc_ack, rtc_stall;
`ifdef  INCLUDE_RTC
`ifdef  INCLUDE_RTC
        assign  rtc_stall = 1'b0;
        assign  rtc_stall = 1'b0;
`endif
`endif
        wire    io_stall, flash_stall, scop_stall, cfg_stall, mem_stall;
        wire    io_stall, flash_stall, scop_stall, cfg_stall, mem_stall;
Line 220... Line 224...
        assign  rtc_sel  =((wb_cyc)&&(io_addr[5:3]==3'h1));
        assign  rtc_sel  =((wb_cyc)&&(io_addr[5:3]==3'h1));
`endif
`endif
        assign  mem_sel  =((wb_cyc)&&(io_addr[5:4]==2'h1));
        assign  mem_sel  =((wb_cyc)&&(io_addr[5:4]==2'h1));
        assign  flash_sel=((wb_cyc)&&(io_addr[5]));
        assign  flash_sel=((wb_cyc)&&(io_addr[5]));
 
 
        assign  none_sel =((wb_cyc)&&(wb_stb)&&(io_addr==6'h0));
`ifdef  FULL_BUSERR_CALCULATION
 
        assign  none_sel =((wb_cyc)&&(wb_stb)&&
 
                        ((io_addr==6'h0)
 
                        ||((~io_addr[5])&&(|wb_addr[22:14]))
 
                        ||((io_addr[5:4]==2'b00)&&(|wb_addr[12])))
 
                        );
        assign  many_sel =((wb_cyc)&&(wb_stb)&&(
        assign  many_sel =((wb_cyc)&&(wb_stb)&&(
                         {3'h0, io_sel}
                         {3'h0, io_sel}
                        +{3'h0, flctl_sel}
                        +{3'h0, flctl_sel}
                        +{3'h0, scop_sel}
                        +{3'h0, scop_sel}
                        +{3'h0, cfg_sel}
                        +{3'h0, cfg_sel}
                        +{3'h0, rtc_sel}
                        +{3'h0, rtc_sel}
                        +{3'h0, mem_sel}
                        +{3'h0, mem_sel}
                        +{3'h0, flash_sel} > 1));
                        +{3'h0, flash_sel} > 1));
        // assign       many_sel = 1'b0;
 
 
 
        wire    many_ack;
 
        assign  many_ack =((wb_cyc)&&(
        assign  many_ack =((wb_cyc)&&(
                         {3'h0, io_ack}
                         {3'h0, io_ack}
                        +{3'h0, scop_ack}
                        +{3'h0, scop_ack}
                        +{3'h0, cfg_ack}
                        +{3'h0, cfg_ack}
`ifdef  INCLUDE_RTC
`ifdef  INCLUDE_RTC
                        +{3'h0, rtc_ack}
                        +{3'h0, rtc_ack}
`endif
`endif
                        +{3'h0, mem_ack}
                        +{3'h0, mem_ack}
                        +{3'h0, flash_ack} > 1));
                        +{3'h0, flash_ack} > 1));
 
`else
 
        assign  many_ack = 1'b0;
 
        assign  many_sel = 1'b0;
 
        assign  none_sel =((wb_cyc)&&(wb_stb)&&(io_addr==6'h0));
 
`endif
        wire            flash_interrupt, scop_interrupt, tmra_int, tmrb_int,
        wire            flash_interrupt, scop_interrupt, tmra_int, tmrb_int,
                        rtc_interrupt, gpio_int, pwm_int, keypad_int,button_int;
                        rtc_interrupt, gpio_int, pwm_int, keypad_int,button_int;
 
 
 
 
        //
        //
        //
        //
        //
        //
        reg             rx_rdy;
        reg             rx_rdy;
        wire    [11:0]   int_vector;
        wire    [11:0]   int_vector;
        assign  int_vector = { flash_interrupt, gpio_int, pwm_int, keypad_int,
        assign  int_vector = {
 
                                flash_interrupt, gpio_int, pwm_int, keypad_int,
                                (~o_tx_stb), rx_rdy,
                                (~o_tx_stb), rx_rdy,
                                tmrb_int, tmra_int,
                                tmrb_int, tmra_int,
                                rtc_interrupt, scop_interrupt,
                                rtc_interrupt, scop_interrupt,
                                wb_err, button_int };
                                wb_err, button_int };
 
 
Line 269... Line 281...
                if (wb_err)
                if (wb_err)
                        bus_err_addr <= wb_addr;
                        bus_err_addr <= wb_addr;
 
 
        wire    [31:0]   timer_a, timer_b;
        wire    [31:0]   timer_a, timer_b;
        wire            zta_ack, zta_stall, ztb_ack, ztb_stall;
        wire            zta_ack, zta_stall, ztb_ack, ztb_stall;
        ziptimer        #(32,31)
        ziptimer        #(32,31,1)
                zipt_a(i_clk, 1'b0, 1'b1, wb_cyc,
                zipt_a(i_clk, 1'b0, 1'b1, wb_cyc,
 
`ifdef  INCLUDE_SECOND_TIMER
                                (wb_stb)&&(io_sel)&&(wb_addr[3:0]==4'h2),
                                (wb_stb)&&(io_sel)&&(wb_addr[3:0]==4'h2),
 
`else
 
                                (wb_stb)&&(io_sel)&&(wb_addr[3:1]==3'h1),
 
`endif
                                wb_we, wb_data, zta_ack, zta_stall, timer_a,
                                wb_we, wb_data, zta_ack, zta_stall, timer_a,
                                tmra_int);
                                tmra_int);
        ziptimer        #(32,31)
`ifdef  INCLUDE_SECOND_TIMER
 
`ifdef  SECOND_TIMER_IS_WATCHDOG
 
        ziptimer        #(32,31,0)
                zipt_b(i_clk, 1'b0, 1'b1, wb_cyc,
                zipt_b(i_clk, 1'b0, 1'b1, wb_cyc,
                                (wb_stb)&&(io_sel)&&(wb_addr[3:0]==4'h3),
                                (wb_stb)&&(io_sel)&&(wb_addr[3:0]==4'h3),
                                wb_we, wb_data, ztb_ack, ztb_stall, timer_b,
                                wb_we, wb_data, ztb_ack, ztb_stall, timer_b,
                                tmrb_int);
                                tmrb_int);
 
`else
 
        ziptimer        #(32,31,1)
 
                zipt_b(i_clk, 1'b0, 1'b1, wb_cyc,
 
                                (wb_stb)&&(io_sel)&&(wb_addr[3:0]==4'h3),
 
                                wb_we, wb_data, ztb_ack, ztb_stall, timer_b,
 
                                tmrb_int);
 
`endif
 
`else
 
        // assign       timer_b = 32'h000;
 
        assign  timer_b = timer_a;
 
        assign  tmrb_int = 1'b0;
 
`endif
 
 
        wire    [31:0]   rtc_data;
        wire    [31:0]   rtc_data;
`ifdef  INCLUDE_RTC
`ifdef  INCLUDE_RTC
        wire    rtcd_ack, rtcd_stall, ppd;
        wire    rtcd_ack, rtcd_stall, ppd;
        // rtcdate      thedate(i_clk, ppd, wb_cyc, (wb_stb)&&(io_sel), wb_we,
        // rtcdate      thedate(i_clk, ppd, wb_cyc, (wb_stb)&&(io_sel), wb_we,
Line 332... Line 362...
                                        pwm_int);
                                        pwm_int);
 
 
        //
        //
        // Special Purpose I/O: Keypad, button, LED status and control
        // Special Purpose I/O: Keypad, button, LED status and control
        //
        //
 
        wire    [3:0]    w_led;
        spio    thespio(i_clk, wb_cyc,(wb_stb)&&(io_sel)&&(wb_addr[3:0]==4'h5),wb_we,
        spio    thespio(i_clk, wb_cyc,(wb_stb)&&(io_sel)&&(wb_addr[3:0]==4'h5),wb_we,
                        wb_data, spio_data, o_kp_col, i_kp_row, i_btn, o_led,
                        wb_data, spio_data, o_kp_col, i_kp_row, i_btn, w_led,
                        keypad_int, button_int);
                        keypad_int, button_int);
 
        assign  o_led = { w_led[3]|w_interrupt,w_led[2]|zip_cpu_int,w_led[1:0] };
 
 
        //
        //
        // General purpose (sort of) I/O:  (Bottom two bits robbed in each
        // General purpose (sort of) I/O:  (Bottom two bits robbed in each
        // direction for an I2C link at the toplevel.v design)
        // direction for an I2C link at the toplevel.v design)
        //
        //
Line 448... Line 480...
        wire    [31:0]   scop_cfg_data;
        wire    [31:0]   scop_cfg_data;
        wire            scop_cfg_ack, scop_cfg_stall, scop_cfg_interrupt;
        wire            scop_cfg_ack, scop_cfg_stall, scop_cfg_interrupt;
`ifdef  DBG_SCOPE
`ifdef  DBG_SCOPE
        wire            scop_cfg_trigger;
        wire            scop_cfg_trigger;
        assign  scop_cfg_trigger = (wb_cyc)&&(wb_stb)&&(cfg_sel);
        assign  scop_cfg_trigger = (wb_cyc)&&(wb_stb)&&(cfg_sel);
        wbscope #(5'ha) wbcfgscope(i_clk, 1'b1, scop_cfg_trigger, cfg_scope,
        wire    scop_trigger = scop_cfg_trigger;
 
`ifdef  COMPRESSED_SCOPE
 
        wbscopc #(5'ha)
 
`else
 
        wbscope #(5'ha)
 
`endif
 
        wbcfgscope(i_clk, 1'b1, scop_trigger,
 
                cfg_scope,
                // Wishbone interface
                // Wishbone interface
                i_clk, wb_cyc, (wb_stb)&&(scop_sel),
                i_clk, wb_cyc, (wb_stb)&&(scop_sel),
                                wb_we, wb_addr[0], wb_data,
                                wb_we, wb_addr[0], wb_data,
                        scop_cfg_ack, scop_cfg_stall, scop_cfg_data,
                        scop_cfg_ack, scop_cfg_stall, scop_cfg_data,
                scop_cfg_interrupt);
                scop_cfg_interrupt);

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