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David Fick - dfick@umich.edu
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David Fick - dfick@umich.edu
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VERSION
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VERSION
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1.0 - June 27, 2010
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1.0 - June 27, 2010
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1.1 - January 7, 2011
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1.1 - January 7, 2011
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1.2 - Feb 7, 2013
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SCAN DESCRIPTION
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SCAN DESCRIPTION
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This is a simple scan chain implemented with deperlify. It has been
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This is a simple scan chain implemented with deperlify. It has been
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used, successfully, on multiple tapeouts.
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used, successfully, on multiple tapeouts.
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are much smaller than the muxing elements needed for the
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are much smaller than the muxing elements needed for the
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chain. Since this is a new feature, the size specified by the
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chain. Since this is a new feature, the size specified by the
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address and data bits should most likely match the total size
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address and data bits should most likely match the total size
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in order to avoid bugs.
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in order to avoid bugs.
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An optional research field is included in the scan signal list.
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When the scan reset bet is set to 1, all bits in the scan chain
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are set to their optional reset value when specified, or zero
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when it is not specified.
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Due to the buffering latches, complex internal interfaces can be
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Due to the buffering latches, complex internal interfaces can be
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emulated using the scan chain. For instance, an SRAM could be
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emulated using the scan chain. For instance, an SRAM could be
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connected to a clock, chip select, write enable, 64-bit data-in,
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connected to a clock, chip select, write enable, 64-bit data-in,
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and 64-bit data-out, all of which are connected to the scan
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and 64-bit data-out, all of which are connected to the scan
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chain. The scan chain would need to be used a few times for each
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chain. The scan chain would need to be used a few times for each
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