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[/] [sdr_ctrl/] [trunk/] [rtl/] [core/] [sdrc_core.v] - Diff between revs 13 and 15

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Rev 13 Rev 15
Line 105... Line 105...
                sdr_dout,
                sdr_dout,
                sdr_den_n,
                sdr_den_n,
 
 
                /* Parameters */
                /* Parameters */
                cfg_sdr_en,
                cfg_sdr_en,
                cfg_sdr_dev_config,     // using 64M/4bank SDRAMs
 
                cfg_sdr_mode_reg,
                cfg_sdr_mode_reg,
                cfg_sdr_tras_d,
                cfg_sdr_tras_d,
                cfg_sdr_trp_d,
                cfg_sdr_trp_d,
                cfg_sdr_trcd_d,
                cfg_sdr_trcd_d,
                cfg_sdr_cas,
                cfg_sdr_cas,
Line 175... Line 174...
output                  sdr_init_done       ; // Indicate SDRAM Initialisation Done
output                  sdr_init_done       ; // Indicate SDRAM Initialisation Done
input [3:0]              cfg_sdr_tras_d      ; // Active to precharge delay
input [3:0]              cfg_sdr_tras_d      ; // Active to precharge delay
input [3:0]             cfg_sdr_trp_d       ; // Precharge to active delay
input [3:0]             cfg_sdr_trp_d       ; // Precharge to active delay
input [3:0]             cfg_sdr_trcd_d      ; // Active to R/W delay
input [3:0]             cfg_sdr_trcd_d      ; // Active to R/W delay
input                   cfg_sdr_en          ; // Enable SDRAM controller
input                   cfg_sdr_en          ; // Enable SDRAM controller
input [1:0]             cfg_sdr_dev_config  ; // 2'b00 - 8 MB, 01 - 16 MB, 10 - 32 MB , 11 - 64 MB
 
input [1:0]              cfg_req_depth       ; // Maximum Request accepted by SDRAM controller
input [1:0]              cfg_req_depth       ; // Maximum Request accepted by SDRAM controller
input [APP_RW-1:0]       app_req_len         ; // Application Burst Request length in 32 bit 
input [APP_RW-1:0]       app_req_len         ; // Application Burst Request length in 32 bit 
input [11:0]             cfg_sdr_mode_reg    ;
input [11:0]             cfg_sdr_mode_reg    ;
input [2:0]              cfg_sdr_cas         ; // SDRAM CAS Latency
input [2:0]              cfg_sdr_cas         ; // SDRAM CAS Latency
input [3:0]              cfg_sdr_trcar_d     ; // Auto-refresh period
input [3:0]              cfg_sdr_trcar_d     ; // Auto-refresh period
Line 216... Line 214...
wire [3:0]               x2b_pre_ok;
wire [3:0]               x2b_pre_ok;
wire                    x2b_refresh, x2b_act_ok, x2b_rdok, x2b_wrok;
wire                    x2b_refresh, x2b_act_ok, x2b_rdok, x2b_wrok;
wire                    xfr_rdstart, xfr_rdlast;
wire                    xfr_rdstart, xfr_rdlast;
wire                    xfr_wrstart, xfr_wrlast;
wire                    xfr_wrstart, xfr_wrlast;
wire [`SDR_REQ_ID_W-1:0]xfr_id;
wire [`SDR_REQ_ID_W-1:0]xfr_id;
wire [13:0]              xfr_addr_msb;
 
wire [APP_DW-1:0]        app_rd_data;
wire [APP_DW-1:0]        app_rd_data;
wire                    app_wr_next_req, app_rd_valid;
wire                    app_wr_next_req, app_rd_valid;
wire                    sdr_cs_n, sdr_cke, sdr_ras_n, sdr_cas_n, sdr_we_n;
wire                    sdr_cs_n, sdr_cke, sdr_ras_n, sdr_cas_n, sdr_we_n;
wire [SDR_BW-1:0]        sdr_dqm;
wire [SDR_BW-1:0]        sdr_dqm;
wire [1:0]               sdr_ba;
wire [1:0]               sdr_ba;
Line 229... Line 226...
wire [SDR_DW-1:0]        sdr_dout_int;
wire [SDR_DW-1:0]        sdr_dout_int;
wire [SDR_BW-1:0]        sdr_den_n;
wire [SDR_BW-1:0]        sdr_den_n;
wire [SDR_BW-1:0]        sdr_den_n_int;
wire [SDR_BW-1:0]        sdr_den_n_int;
 
 
wire [1:0]               xfr_bank_sel;
wire [1:0]               xfr_bank_sel;
wire [1:0]               cfg_sdr_dev_config;
 
 
 
wire [APP_AW:0]          app_req_addr_int;
wire [APP_AW:0]          app_req_addr_int;
wire [APP_AW-1:0]        app_req_addr;
wire [APP_AW-1:0]        app_req_addr;
wire [APP_RW-1:0]        app_req_len_int;
wire [APP_RW-1:0]        app_req_len_int;
wire [APP_RW-1:0]        app_req_len;
wire [APP_RW-1:0]        app_req_len;
Line 269... Line 265...
   // if wrap=0, decodes the bank and passe the request to bank_ctl
   // if wrap=0, decodes the bank and passe the request to bank_ctl
 
 
sdrc_req_gen #(.SDR_DW(SDR_DW) , .SDR_BW(SDR_BW)) u_req_gen (
sdrc_req_gen #(.SDR_DW(SDR_DW) , .SDR_BW(SDR_BW)) u_req_gen (
          .clk                (clk          ),
          .clk                (clk          ),
          .reset_n            (reset_n            ),
          .reset_n            (reset_n            ),
          .sdr_dev_config     (cfg_sdr_dev_config ),
 
          .cfg_colbits        (cfg_colbits        ),
          .cfg_colbits        (cfg_colbits        ),
 
 
        /* Request from app */
        /* Request from app */
          .r2x_idle           (r2x_idle           ),
          .r2x_idle           (r2x_idle           ),
          .req                (app_req_int        ),
          .req                (app_req_int        ),
Line 348... Line 343...
          .x2b_act_ok         (x2b_act_ok         ),
          .x2b_act_ok         (x2b_act_ok         ),
          .x2b_rdok           (x2b_rdok           ),
          .x2b_rdok           (x2b_rdok           ),
          .x2b_wrok           (x2b_wrok           ),
          .x2b_wrok           (x2b_wrok           ),
 
 
      /* for generate cuurent xfr address msb */
      /* for generate cuurent xfr address msb */
          .sdr_dev_config     (cfg_sdr_dev_config ),
 
          .sdr_req_norm_dma_last(app_req_dma_last_int),
          .sdr_req_norm_dma_last(app_req_dma_last_int),
          .xfr_bank_sel       (xfr_bank_sel       ),
          .xfr_bank_sel       (xfr_bank_sel       ),
          .xfr_addr_msb       (xfr_addr_msb       ),
 
 
 
       /* SDRAM Timing */
       /* SDRAM Timing */
          .tras_delay         (cfg_sdr_tras_d     ),
          .tras_delay         (cfg_sdr_tras_d     ),
          .trp_delay          (cfg_sdr_trp_d      ),
          .trp_delay          (cfg_sdr_trp_d      ),
          .trcd_delay         (cfg_sdr_trcd_d     )
          .trcd_delay         (cfg_sdr_trcd_d     )

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