| Line 105... |
Line 105... |
x2a_rdstart,
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x2a_rdstart,
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x2a_wrstart,
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x2a_wrstart,
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x2a_rdlast,
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x2a_rdlast,
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x2a_wrlast,
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x2a_wrlast,
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x2a_id,
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x2a_id,
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app_wrdt,
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a2x_wrdt,
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app_wren_n,
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a2x_wren_n,
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x2a_wrnext,
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x2a_wrnext,
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x2a_rddt,
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x2a_rddt,
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x2a_rdok,
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x2a_rdok,
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sdr_init_done,
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sdr_init_done,
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|
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| Line 156... |
Line 156... |
x2b_wrok;
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x2b_wrok;
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/* Data Flow to the app */
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/* Data Flow to the app */
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output x2a_rdstart, x2a_wrstart, x2a_rdlast, x2a_wrlast;
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output x2a_rdstart, x2a_wrstart, x2a_rdlast, x2a_wrlast;
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output [`SDR_REQ_ID_W-1:0] x2a_id;
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output [`SDR_REQ_ID_W-1:0] x2a_id;
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|
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input [SDR_DW-1:0] app_wrdt;
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input [SDR_DW-1:0] a2x_wrdt;
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input [SDR_BW-1:0] app_wren_n;
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input [SDR_BW-1:0] a2x_wren_n;
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output [SDR_DW-1:0] x2a_rddt;
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output [SDR_DW-1:0] x2a_rddt;
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output x2a_wrnext, x2a_rdok, sdr_init_done;
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output x2a_wrnext, x2a_rdok, sdr_init_done;
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|
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/* Interface to SDRAMs */
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/* Interface to SDRAMs */
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output sdr_cs_n, sdr_cke, sdr_ras_n, sdr_cas_n,
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output sdr_cs_n, sdr_cke, sdr_ras_n, sdr_cas_n,
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| Line 554... |
Line 554... |
sdr_ras_n <= xfr_cmd[2];
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sdr_ras_n <= xfr_cmd[2];
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sdr_cas_n <= xfr_cmd[1];
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sdr_cas_n <= xfr_cmd[1];
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sdr_we_n <= xfr_cmd[0];
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sdr_we_n <= xfr_cmd[0];
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sdr_cke <= (xfr_st != `XFR_IDLE) ? 1'b1 :
|
sdr_cke <= (xfr_st != `XFR_IDLE) ? 1'b1 :
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~(mgmt_idle & b2x_idle & r2x_idle);
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~(mgmt_idle & b2x_idle & r2x_idle);
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sdr_dqm <= (wr_next) ? app_wren_n : {SDR_BW{1'b0}};
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sdr_dqm <= (wr_next) ? a2x_wren_n : {SDR_BW{1'b0}};
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sdr_den_n <= (wr_next) ? {SDR_BW{1'b0}} : {SDR_BW{1'b1}};
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sdr_den_n <= (wr_next) ? {SDR_BW{1'b0}} : {SDR_BW{1'b1}};
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end // else: !if(~reset_n)
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end // else: !if(~reset_n)
|
|
|
always @ (posedge clk) begin
|
always @ (posedge clk) begin
|
|
|
if (~xfr_cmd[3]) begin
|
if (~xfr_cmd[3]) begin
|
sdr_addr <= xfr_addr;
|
sdr_addr <= xfr_addr;
|
sdr_ba <= xfr_ba;
|
sdr_ba <= xfr_ba;
|
end // if (~xfr_cmd[3])
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end // if (~xfr_cmd[3])
|
|
|
sdr_dout <= (wr_next) ? app_wrdt : sdr_dout;
|
sdr_dout <= (wr_next) ? a2x_wrdt : sdr_dout;
|
|
|
end // always @ (posedge clk)
|
end // always @ (posedge clk)
|
|
|
/************************************************************************/
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/************************************************************************/
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// Refresh and Initialization
|
// Refresh and Initialization
|
