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[/] [spacewire_light/] [trunk/] [bench/] [vhdl/] [ahbram_loadfile.vhd] - Diff between revs 5 and 12

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Rev 5 Rev 12
Line 35... Line 35...
    type mem_type is array(natural range <>) of std_logic_vector(31 downto 0);
    type mem_type is array(natural range <>) of std_logic_vector(31 downto 0);
    signal mem: mem_type(0 to (2**(abits-2)-1));
    signal mem: mem_type(0 to (2**(abits-2)-1));
 
 
    signal s_load:  std_ulogic := '1';
    signal s_load:  std_ulogic := '1';
    signal s_rdata: std_logic_vector(31 downto 0) := (others => '0');
    signal s_rdata: std_logic_vector(31 downto 0) := (others => '0');
 
    signal s_wdata: std_logic_vector(31 downto 0) := (others => '0');
    signal s_ready: std_ulogic := '0';
    signal s_ready: std_ulogic := '0';
    signal s_write: std_ulogic := '0';
    signal s_write: std_ulogic := '0';
    signal s_waddr: std_logic_vector(31 downto 0) := (others => '0');
    signal s_waddr: std_logic_vector(31 downto 0) := (others => '0');
    signal s_wsize: std_logic_vector(2 downto 0)  := "000";
    signal s_wsize: std_logic_vector(2 downto 0)  := "000";
 
 
Line 85... Line 86...
 
 
begin
begin
 
 
    ahbo.hready     <= s_ready;
    ahbo.hready     <= s_ready;
    ahbo.hresp      <= HRESP_OKAY;
    ahbo.hresp      <= HRESP_OKAY;
    ahbo.hrdata     <= s_rdata;
    ahbo.hrdata     <= ahbdrivedata(s_rdata);
    ahbo.hsplit     <= (others => '0');
    ahbo.hsplit     <= (others => '0');
    ahbo.hcache     <= '1';
 
    ahbo.hirq       <= (others => '0');
    ahbo.hirq       <= (others => '0');
    ahbo.hconfig    <= hconfig;
    ahbo.hconfig    <= hconfig;
    ahbo.hindex     <= hindex;
    ahbo.hindex     <= hindex;
 
 
 
    s_wdata         <= ahbreadword(ahbi.hwdata, s_waddr(4 downto 2));
 
 
    process (clk) is
    process (clk) is
 
 
        procedure loadfile is
        procedure loadfile is
            file fd: text open read_mode is fname;
            file fd: text open read_mode is fname;
            variable lin: line;
            variable lin: line;
Line 180... Line 182...
            if s_write = '1' and s_ready = '1' then
            if s_write = '1' and s_ready = '1' then
                case s_wsize is
                case s_wsize is
                    when HSIZE_BYTE =>
                    when HSIZE_BYTE =>
                        case s_waddr(1 downto 0) is
                        case s_waddr(1 downto 0) is
                            when "00" =>
                            when "00" =>
                                mem(wa)(31 downto 24) <= ahbi.hwdata(31 downto 24);
                                mem(wa)(31 downto 24) <= s_wdata(31 downto 24);
                            when "01" =>
                            when "01" =>
                                mem(wa)(23 downto 16) <= ahbi.hwdata(23 downto 16);
                                mem(wa)(23 downto 16) <= s_wdata(23 downto 16);
                            when "10" =>
                            when "10" =>
                                mem(wa)(15 downto 8)  <= ahbi.hwdata(15 downto 8);
                                mem(wa)(15 downto 8)  <= s_wdata(15 downto 8);
                            when others =>
                            when others =>
                                mem(wa)(7 downto 0)   <= ahbi.hwdata(7 downto 0);
                                mem(wa)(7 downto 0)   <= s_wdata(7 downto 0);
                        end case;
                        end case;
                    when HSIZE_HWORD =>
                    when HSIZE_HWORD =>
                        if s_waddr(1) = '1' then
                        if s_waddr(1) = '1' then
                            mem(wa)(15 downto 0)  <= ahbi.hwdata(15 downto 0);
                            mem(wa)(15 downto 0)  <= s_wdata(15 downto 0);
                        else
                        else
                            mem(wa)(31 downto 16) <= ahbi.hwdata(31 downto 16);
                            mem(wa)(31 downto 16) <= s_wdata(31 downto 16);
                        end if;
                        end if;
                    when others =>
                    when others =>
                        mem(wa) <= ahbi.hwdata;
                        mem(wa) <= s_wdata;
                end case;
                end case;
            end if;
            end if;
 
 
            if rstn = '0' then
            if rstn = '0' then
                s_ready <= '0';
                s_ready <= '0';

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